cpldjtag.c

stm32的flash的在线改写烧录功能和spi通讯

/****************************************************************************/
/*																			*/
/*	Module:			jbi51.c													*/
/*																			*/
/*					Copyright (C) Altera Corporation 1998					*/
/*																			*/
/*	Description:	Main source file for JAM Byte Code Player for 8051		*/
/*																			*/
/****************************************************************************/

/* header file with register definitions for Dallas DS87C520 microprocessor */
//#include <ds8xc520.h>

/* header files needed for console I/O functions (like printf) */
//#include <stdio.h>
//#include <stdlib.h>
#include <reg51.H>

/****************************************************************************/
/*																			*/
/*	Port-specific Definitions												*/
/*																			*/
/****************************************************************************/

/*
*	Modifiers to select addressing mode for data pointers for the 8051
*	microprocessor.  These keywords (code, xdata, pdata, idata, data) are
*	compatible with the Keil C51 compiler for the 8051.
*
*	Note that the pointer for program storage is not passed as a parameter,
*	but is provided as a global variable.
*/
#define CONSTANT_AREA code
#define XDATA_AREA xdata /* external RAM accessed by 16-bit pointer */
#define PDATA_AREA pdata /* external RAM accessed by 8-bit pointer */
#define IDATA_AREA idata /* internal RAM accessed by 8-bit pointer */
#define RDATA_AREA data  /* internal RAM registers with direct access */
#define BIT bit          /* internal RAM single bit data type */

/*
*	By default, the JBC file is located in the code memory.  To locate the
*	JBC file in the external data (xdata) area, define JBC_FILE_IN_RAM=1.
*/
#ifdef JBC_FILE_IN_RAM
#define FILE_AREA XDATA_AREA
#define FILE_OR_XDATA_AREA XDATA_AREA
#else
#define FILE_AREA CONSTANT_AREA
#define FILE_OR_XDATA_AREA
#endif /* JBC_FILE_IN_RAM */

/****************************************************************************/
/*																			*/
/*	Constant definitions													*/
/*																			*/
/****************************************************************************/

#define JBI_MAX_PROGRAM_SIZE (48 * 1024)	/* when JBC file is in RAM */

#define JBI_STACK_SIZE 128

#define JBI_HEAP_SIZE (3 * 1024)

#define JBI_MESSAGE_LENGTH 255

#define JBI_VARIABLE_COUNT 150

/* maximum JTAG IR and DR lengths (in bits) */
#define JBIC_MAX_JTAG_IR_PREAMBLE   128
#define JBIC_MAX_JTAG_IR_POSTAMBLE  128
#define JBIC_MAX_JTAG_IR_LENGTH     256
#define JBIC_MAX_JTAG_DR_PREAMBLE   128
#define JBIC_MAX_JTAG_DR_POSTAMBLE  128
#define JBIC_MAX_JTAG_DR_LENGTH    2048

#define JBI_RETURN_TYPE unsigned char

#define JBIC_SUCCESS            0
#define JBIC_OUT_OF_MEMORY      1
#define JBIC_STACK_OVERFLOW     2
#define JBIC_IO_ERROR           3
#define JBIC_UNEXPECTED_END     4
#define JBIC_ILLEGAL_OPCODE     5
#define JBIC_INTEGER_OVERFLOW   6
#define JBIC_DIVIDE_BY_ZERO     7
#define JBIC_CRC_ERROR          8
#define JBIC_INTERNAL_ERROR     9
#define JBIC_BOUNDS_ERROR      10
#define JBIC_VECTOR_MAP_FAILED 11
#define JBIC_USER_ABORT        12
#define JBIC_UNDEFINED_SYMBOL  13

#define JBI_JTAG_STATE unsigned char

#define RESET      0
#define IDLE       1
#define DRSELECT   2
#define DRCAPTURE  3
#define DRSHIFT    4
#define DREXIT1    5
#define DRPAUSE    6
#define DREXIT2    7
#define DRUPDATE   8
#define IRSELECT   9
#define IRCAPTURE 10
#define IRSHIFT   11
#define IREXIT1   12
#define IRPAUSE   13
#define IREXIT2   14
#define IRUPDATE  15
#define ILLEGAL_JTAG_STATE 16

/* flag bits for jbi_jtag_io() function */
#define TMS_HIGH   1
#define TMS_LOW    0
#define TDI_HIGH   1
#define TDI_LOW    0
#define READ_TDO   1
#define IGNORE_TDO 0

/*
*	ACA data decompression constants
*/
#define	SHORT_BITS			16
#define	CHAR_BITS			8
#define	DATA_BLOB_LENGTH	3
#define	MATCH_DATA_LENGTH	8192
#define JBI_ACA_REQUEST_SIZE 1024
#define JBI_ACA_BUFFER_SIZE	(MATCH_DATA_LENGTH + JBI_ACA_REQUEST_SIZE)


 sbit  P1_1= 0x91;
 sbit  P1_0=0x90;
 sbit  P1_7=0x97;
 //sbit  P1_7=0xa4;
 sbit  P1_6=0x96;
 sbit  P2_4=0xa4;
 sfr OSCXCN   =  0xB1;                      
 
 sfr OSCICN   =  0xB2;	

sfr XBR0     =  0xE1;	/* DIGITAL CROSSBAR CONFIGURATION REGISTER 0               */
sfr XBR1     =  0xE2;	/* DIGITAL CROSSBAR CONFIGURATION REGISTER 1               */
sfr XBR2     =  0xE3;	/* DIGITAL CROSSBAR CONFIGURATION REGISTER 2              */
sfr EMI0TC   =  0xA1;	 /* EMIF TIMING CONTROL 									*/
sfr EMI0CF   =  0xA3;	 /* EXTERNAL MEMORY INTERFACE (EMIF) CONFIGURATION			*/
sfr P74OUT   =  0xB5; 
sfr P0MDOUT  =  0xA4;
sfr P1MDOUT  =  0xA5;
sfr P2MDOUT  =  0xA6;



 #define NULL ((void *) 0L)

 
 BIT jbi_jtag_io(BIT tms, BIT tdi, BIT read_tdo)
 {
	 BIT tdo = 0;
 
	 P1_1 = tms;	 /* set TMS signal */
	 P1_0 = tdi;	 /* set TDI signal */
 
	 if (read_tdo)
	 {
		 tdo = P1_6; /* read TDO signal */
	 }
 
	 P1_7 = 1;		 /* strobe TCK signal */
	 P1_7 = 0;
 
	 return (tdo);
 }


 
 void jbi_jtag_drscan
 (
	 unsigned char start_state,
	 unsigned int count,
	 unsigned char XDATA_AREA *tdi,
	 unsigned char XDATA_AREA *tdo
 )
 {
	 unsigned int i = 0;
	 BIT tdo_bit = 0;
 
	 /*
	 *	 First go to DRSHIFT state
	 */
	 switch (start_state)
	 {
	 case 0:					 /* IDLE */
		 jbi_jtag_io(1, 0, 0);	 /* DRSELECT */
		 jbi_jtag_io(0, 0, 0);	 /* DRCAPTURE */
		 jbi_jtag_io(0, 0, 0);	 /* DRSHIFT */
		 break;
 
	 case 1:					 /* DRPAUSE */
		 jbi_jtag_io(1, 0, 0);	 /* DREXIT2 */
		 jbi_jtag_io(0, 0, 0);	 /* DRSHIFT */
		 break;
 
	 case 2:					 /* IRPAUSE */
		 jbi_jtag_io(1, 0, 0);	 /* IREXIT2 */
		 jbi_jtag_io(1, 0, 0);	 /* IRUPDATE */
		 jbi_jtag_io(1, 0, 0);	 /* DRSELECT */
		 jbi_jtag_io(0, 0, 0);	 /* DRCAPTURE */
		 jbi_jtag_io(0, 0, 0);	 /* DRSHIFT */
		 break;
 
	 default:
		 break;
	 }
 
	 /* loop in the SHIFT-DR state */
	 for (i = 0; i < count; i++)
	 {
		 tdo_bit = jbi_jtag_io(
			 (i == count - 1) ? 1 : 0,
			 tdi[i >> 3] & (1 << (i & 7)) ? 1 : 0,
			 (tdo != NULL) ? 1 : 0);
 
		 if (tdo != NULL)
		 {
			 if (tdo_bit == 1)
			 {
				 tdo[i >> 3] |= (1 << (i & 7));
			 }
			 else
			 {
				 tdo[i >> 3] &= ~(unsigned char) (1 << (i & 7));
			 }
		 }
	 }
 
	 jbi_jtag_io(0, 0, 0);	 /* DRPAUSE */
 }
 
 void jbi_jtag_irscan
 (
	 unsigned char start_state,
	 unsigned int count,
	 unsigned char XDATA_AREA *tdi,
	 unsigned char XDATA_AREA *tdo
 )
 {
	 unsigned int i = 0;
	 BIT tdo_bit = 0;
 
	 /*
	 *	 First go to IRSHIFT state
	 */
	 switch (start_state)
	 {
	 case 0:					 /* IDLE */
		 jbi_jtag_io(1, 0, 0);	 /* DRSELECT */
		 jbi_jtag_io(1, 0, 0);	 /* IRSELECT */
		 jbi_jtag_io(0, 0, 0);	 /* IRCAPTURE */
		 jbi_jtag_io(0, 0, 0);	 /* IRSHIFT */
		 break;
 
	 case 1:					 /* DRPAUSE */
		 jbi_jtag_io(1, 0, 0);	 /* DREXIT2 */
		 jbi_jtag_io(1, 0, 0);	 /* DRUPDATE */
		 jbi_jtag_io(1, 0, 0);	 /* DRSELECT */
		 jbi_jtag_io(1, 0, 0);	 /* IRSELECT */
		 jbi_jtag_io(0, 0, 0);	 /* IRCAPTURE */
		 jbi_jtag_io(0, 0, 0);	 /* IRSHIFT */
		 break;
 
	 case 2:					 /* IRPAUSE */
		 jbi_jtag_io(1, 0, 0);	 /* IREXIT2 */
		 jbi_jtag_io(0, 0, 0);	 /* IRSHIFT */
		 break;
 
	 default:
		 break;
	 }
 
	 /* loop in the SHIFT-IR state */
	 for (i = 0; i < count; i++)
	 {
		 tdo_bit = jbi_jtag_io(
			 (i == count - 1) ? 1 : 0,
			 tdi[i >> 3] & (1 << (i & 7)) ? 1 : 0,
			 (tdo != NULL) ? 1 : 0);
 
		 if (tdo != NULL)
		 {
			 if (tdo_bit == 1)
			 {
				 tdo[i >> 3] |= (1 << (i & 7));
			 }
			 else
			 {
				 tdo[i >> 3] &= ~(unsigned char) (1 << (i & 7));
			 }
		 }
	 }
 
	 jbi_jtag_io(0, 0, 0);	 /* IRPAUSE */
 }


 void jbi_jtag_reset_idle(void)
 
 /* 																		 */
 /****************************************************************************/
 {
	 unsigned char i;
 
	 /*
	 *	 Go to Test Logic Reset (no matter what the starting state may be)
	 */
	 for (i = 0; i < 5; ++i)
	 {
		 jbi_jtag_io(TMS_HIGH, TDI_LOW, IGNORE_TDO);
	 }
 
	 /*
	 *	 Now step to Run Test / Idle
	 */
	 jbi_jtag_io(TMS_LOW, TDI_LOW, IGNORE_TDO);
 
//	 jbi_jtag_state = IDLE;
 }


 
 void SYSCLK_Init (void)
 {
	int i;								// delay counter
	OSCXCN = 0x67;						// start external oscillator with
										// 24.000MHz crystal
	for (i=0; i < 256; i++) ;			// Wait for osc. to start up
	while (!(OSCXCN & 0x80)) ;			// Wait for crystal osc. to settle
	OSCICN = 0x88;						// select external oscillator as SYSCLK
										// source and enable missing clock
 }
 
 
 void PORT_Init (void)
 {
	 XBR0	 = 0x06;					 // Enable SMBus, SPI0
	 XBR1	 = 0x84;					 // Enable sysclk out
	 XBR2	 = 0x40;					 // Enable crossbar and weak pull-ups
	 EMI0TC  = 0xFF;					 
	 EMI0CF  = 0x34;					 // p5 p6 p7 
	 P1MDOUT  = 0xFF;					 //p2 端口引脚的输出方式为推挽
	 P2MDOUT  = 0xFF;
	 P0MDOUT = 0x15;
	 P0MDOUT |= 0x80;					 //clk 端口引脚的输出方式为推挽
 }
 
 void main(void)
 {
	 unsigned int XDATA_AREA note_offset = 0;
	 unsigned int XDATA_AREA error_address = 0;
	 JBI_RETURN_TYPE XDATA_AREA crc_result = JBIC_SUCCESS;
	 JBI_RETURN_TYPE XDATA_AREA exec_result = JBIC_SUCCESS;
	 unsigned int XDATA_AREA expected_crc = 0;
	 unsigned int XDATA_AREA actual_crc = 0;
	 int XDATA_AREA exit_status = 0;
	 int XDATA_AREA exit_code = 0;
	 char CONSTANT_AREA *exit_string = NULL;
	 char XDATA_AREA buffer[32];
	 char CONSTANT_AREA **init_list;
 
	 char CONSTANT_AREA banner[] =
		 "Jam Byte Code Player Version 1.0\n"
		 "Copyright (C) 1998 Altera Corporation\n";
 
#ifdef JBC_FILE_IN_RAM
	 char CONSTANT_AREA usage_message[] =
		 "Commands: Load, CRC, Notes, ID, Erase, Blankcheck, Program, Verify, All";
#else
	 /* load command is not available when JBC file is in ROM area */
	 char CONSTANT_AREA usage_message[] =
		 "Commands: CRC, Notes, ID, Erase, Blankcheck, Program, Verify, All";
#endif /* JBC_FILE_IN_RAM */
 
	 /*
	 *	 Initialize internal registers
	 */
	 SYSCLK_Init ();
	 PORT_Init ();
	 SCON = 0x98;
 //  SCON1 = 0x5C;
	 TCON = 0xC0;
	 TMOD = 0x20;
	 PCON = 0xB0;
	 TL0 = 0x00;
	 TL1 = 0xD2;
	 TH0 = 0x00;
	 TH1 = 0xCA;
 //  CKCON = 0x11;
 //  WDCON = 0xC8;
	 TR1 = 1;
	 TI = 1;
	 TI = 1;	 
 
   jbi_jtag_reset_idle();

    jbi_jtag_drscan();

    }