📄 promise_ide.c
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}
#if PDC202XX_DECODE_REGISTER_INFO
status = pciConfigInByte(BusNo,DeviceNo,FuncNo,drive_pci,&AP);
status = pciConfigInByte(BusNo,DeviceNo,FuncNo,drive_pci|0x01,&BP);
status = pciConfigInByte(BusNo,DeviceNo,FuncNo,drive_pci|0x02,&CP);
status = pciConfigInByte(BusNo,DeviceNo,FuncNo,drive_pci|0x03,&DP);
decode_registers(REG_A, AP);
decode_registers(REG_B, BP);
decode_registers(REG_C, CP);
decode_registers(REG_D, DP);
#endif /* PDC202XX_DECODE_REGISTER_INFO */
return err;
}
#if 1
/******************************************************
config_chipset_for_dma was lifted from linux driver
******************************************************/
static int config_chipset_for_dma (int ctrl,int drive)
{
ATA_CTRL *pCtrl = &ataCtrl[ctrl];
ATA_DRIVE *pDrive;
//unsigned long base_add4;
unsigned short CIS;
unsigned char drive_pci;
//unsigned char AP, BP, CP, DP, EP, CLKSPD;
int status;
unsigned char configTiming0,configTiming1,configTiming2;
pDrive = &pCtrl->drive[drive];
configTiming0 = 0;
configTiming1 = 0;
configTiming2 = 0;
status = pciConfigInWord(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
0x50, /* offset into the configuration space */
&CIS /* data write from offset */
);
DbgPrint(("Contoller Initial state\n Secondary Channel %s\n Primary Channel%s\n Primary Cable %s\n Secondary cable %s\n clock %s\n",
(CIS & 1<<13) ? "Enabled":"Disabled",
(CIS & 1<<12) ? "Enabled":"Disabled",
(CIS & 1<<10) ? "40 pin":"80 pin",
(CIS & 1<<11) ? "40 pin":"80 pin",
(CIS & 1<<6) ? "66 MHz":"33 MHz",0));
if(pDrive->type != ATA_TYPE_ATA && pDrive->type != ATA_TYPE_ATAPI) {
DbgPrint(("no drive on ctrl %d drive %d\n",ctrl,drive,0,0,0,0));
return OK;
}
/* if 40pin cable and dma greater then UDMA 2 downgrade to UDMA 2 */
if (CIS & 1<<(10+ctrl) && pDrive->rwDma>ATA_DMA_ULTRA_W_2)
pDrive->rwDma = ATA_DMA_ULTRA_W_2;
#if 0
/* set internal clock to 66MHz for all UDMA modes */
if (pDrive->rwDma & ATA_DMA_ULTRA_W_0) {
CLKSPD = sysInByte(baseAddress[4]+0x11);
sysOutByte(baseAddress[4]+0x11,CLKSPD | (ctrl ? 0x8 : 0x2));
}
#endif
/* set controller timings */
switch((ctrl ? 2 : 0) + drive) {
case 0:
drive_pci = 0x60;
configTiming0 = 0xC0 | ((pDrive->rwMode > ATA_PIO_W_2) ? 0x20 : 0) | ((pDrive->type == ATA_TYPE_ATA) ? 0x10 : 0);
break;
case 1:
drive_pci = 0x64;
configTiming0 = ((pDrive->rwMode > ATA_PIO_W_2) ? 0x20 : 0) | ((pDrive->type == ATA_TYPE_ATA) ? 0x10 : 0);
break;
case 2:
drive_pci = 0x68;
configTiming0 = 0xC0 | ((pDrive->rwMode > ATA_PIO_W_2) ? 0x20 : 0) | ((pDrive->type == ATA_TYPE_ATA) ? 0x10 : 0);
break;
case 3:
drive_pci = 0x6c;
configTiming0 = ((pDrive->rwMode > ATA_PIO_W_2) ? 0x20 : 0) | ((pDrive->type == ATA_TYPE_ATA) ? 0x10 : 0);
break;
default:
DbgPrint(("ERROR wim thinks this is broken\n",0,0,0,0,0,0));
return OK;
}
/* set pio mode timming */
switch(pDrive->rwMode)
{
case ATA_PIO_W_0:
configTiming0 |= 0x09;
configTiming1 = 0x13;
break;
case ATA_PIO_W_1:
configTiming0 |= 0x05;
configTiming1 = 0x0c;
break;
case ATA_PIO_W_2:
configTiming0 |= 0x03;
configTiming1 = 0x08;
break;
case ATA_PIO_W_3:
configTiming0 |= 0x02;
configTiming1 = 0x06;
break;
case ATA_PIO_W_4:
configTiming0 |= 0x01;
configTiming1 = 0x04;
break;
default:
configTiming0 |= 0x09;
configTiming1 = 0x13;
}
/* set DMA mode timings */
if (pDrive->okDma) {
if (pDrive->rwDma & ATA_DMA_ULTRA_W_0) {
configTiming1 |= 0x01<<5;
configTiming2 = 0x01;
}
else if(pDrive->rwDma & ATA_DMA_MULTI_W_0)
switch (pDrive->rwDma)
{
case ATA_DMA_MULTI_W_0:
configTiming1 |= 0x07<<5;
configTiming2 = 0x0f;
break;
case ATA_DMA_MULTI_W_1:
configTiming1 |= 0x03<<5;
configTiming2 = 0x04;
break;
case ATA_DMA_MULTI_W_2:
configTiming1 |= 0x03<<5;
configTiming2 = 0x03;
break;
default:
configTiming1 |= 0x07<<5;
configTiming2 = 0x0f;
break;
}
else {
DbgPrint(("Don't know how to setup single word dma\n",0,0,0,0,0,0));
}
}
status = pciConfigOutByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci, /* offset into the configuration space */
configTiming0 /* data write from offset */
);
status = pciConfigOutByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci+1, /* offset into the configuration space */
configTiming1 /* data write from offset */
);
status = pciConfigOutByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci+2, /* offset into the configuration space */
configTiming2 /* data write from offset */
);
(void) ataCmd(
ctrl,
drive,
ATA_CMD_SET_FEATURE,
ATA_SUB_SET_RWMODE,
pDrive->rwDma
);
/* tell ataDrv where dma regester is */
ataDmaConfig(ctrl,baseAddress[4]);
#if PDC202XX_DECODE_REGISTER_INFO
status = pciConfigInByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci, /* offset into the configuration space */
&AP /* data write from offset */
);
status = pciConfigInByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci|0x01,/* offset into the configuration space */
&BP /* data write from offset */
);
status = pciConfigInByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci|0x02,/* offset into the configuration space */
&CP /* data write from offset */
);
status = pciConfigInByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci|0x03,/* offset into the configuration space */
&DP /* data write from offset */
);
taskDelay(10);
decode_registers(REG_A, AP);
decode_registers(REG_B, BP);
decode_registers(REG_C, CP);
decode_registers(REG_D, DP);
taskDelay(10);
#endif /* PDC202XX_DECODE_REGISTER_INFO */
return OK;
}
#else
/******************************************************
config_chipset_for_dma was lifted from linux driver
******************************************************/
static int config_chipset_for_dma (int ctrl, int drive)
{
ATA_CTRL *pCtrl = &ataCtrl[ctrl];
ATA_DRIVE *pDrive = &pCtrl->drive[drive];
unsigned long base_add4;
unsigned short CIS;
unsigned int drive_conf;
unsigned char drive_pci;
unsigned char test1, test2, speed;
unsigned char AP, BP, CP, DP, EP, CLKSPD;
int drive_number = (ctrl ? 2 : 0) + drive;
int status;
status = pciConfigInByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
0x50, /* offset into the configuration space */
&EP /* data write from offset */
);
speed=0;
switch(drive_number) {
case 0:
drive_pci = 0x60;
status = pciConfigInLong(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci, /* offset into the configuration space */
&drive_conf /* data write from offset */
);
#if 0
if ((drive_conf != 0x004ff304) && (drive_conf != 0x004ff3c4)) {
goto chipset_is_set;
}
#endif
status = pciConfigInByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci, /* offset into the configuration space */
&test1 /* data write from offset */
);
if (!(test1 & SYNC_ERRDY_EN)) {
status = pciConfigOutByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci, /* offset into the configuration space */
test1|SYNC_ERRDY_EN /* data write from offset */
);
}
break;
case 1: drive_pci = 0x64;
status = pciConfigInLong(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci, /* offset into the configuration space */
&drive_conf /* data write from offset */
);
#if 0
if ((drive_conf != 0x004ff304) && (drive_conf != 0x004ff3c4)) {
goto chipset_is_set;
}
#endif
status = pciConfigInByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
0x60, /* offset into the configuration space */
&test1 /* data write from offset */
);
status = pciConfigInByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci, /* offset into the configuration space */
&test2 /* data write from offset */
);
if ((test1 & SYNC_ERRDY_EN) && !(test2 & SYNC_ERRDY_EN)) {
status = pciConfigOutByte(
BusNo, /* bus number */
DeviceNo, /* device number */
FuncNo, /* function number */
drive_pci, /* offset into the configuration space */
test2|SYNC_ERRDY_EN /* data write from offset */
);
}
break;
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