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📄 emit.fit.qmsg

📁 这是一个超声波发射的控制电路的设计,可以发出连续的单载波脉冲.
💻 QMSG
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Nov 09 20:30:18 2006 " "Info: Processing started: Thu Nov 09 20:30:18 2006" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off emit -c emit " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off emit -c emit" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "emit EP2C20F256C6 " "Info: Selected device EP2C20F256C6 for design \"emit\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0}
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." {  } {  } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C8F256C6 " "Info: Device EP2C8F256C6 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0}
{ "Info" "IFIOMGR_PINS_MISSING_LOCATION_INFO" "5 5 " "Info: No exact pin location assignment(s) for 5 pins of 5 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "out_a " "Info: Pin out_a not assigned to an exact location on the device" {  } { { "emit.vhd" "" { Text "D:/software/Altera.Quartus.II.v6.0-SHooTERS/win/pan/cpld/frequency/9-12/emit.vhd" 8 -1 0 } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" "" { Assignment "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" 1 { { 0 "out_a" } } } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { out_a } "NODE_NAME" } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { out_a } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "out_b " "Info: Pin out_b not assigned to an exact location on the device" {  } { { "emit.vhd" "" { Text "D:/software/Altera.Quartus.II.v6.0-SHooTERS/win/pan/cpld/frequency/9-12/emit.vhd" 9 -1 0 } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" "" { Assignment "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" 1 { { 0 "out_b" } } } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { out_b } "NODE_NAME" } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { out_b } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "clk2 " "Info: Pin clk2 not assigned to an exact location on the device" {  } { { "emit.vhd" "" { Text "D:/software/Altera.Quartus.II.v6.0-SHooTERS/win/pan/cpld/frequency/9-12/emit.vhd" 7 -1 0 } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" "" { Assignment "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" 1 { { 0 "clk2" } } } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clk2 } "NODE_NAME" } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clk2 } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "clr1 " "Info: Pin clr1 not assigned to an exact location on the device" {  } { { "emit.vhd" "" { Text "D:/software/Altera.Quartus.II.v6.0-SHooTERS/win/pan/cpld/frequency/9-12/emit.vhd" 6 -1 0 } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" "" { Assignment "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" 1 { { 0 "clr1" } } } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clr1 } "NODE_NAME" } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clr1 } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "clk1 " "Info: Pin clk1 not assigned to an exact location on the device" {  } { { "emit.vhd" "" { Text "D:/software/Altera.Quartus.II.v6.0-SHooTERS/win/pan/cpld/frequency/9-12/emit.vhd" 7 -1 0 } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" "" { Assignment "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" 1 { { 0 "clk1" } } } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clk1 } "NODE_NAME" } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clk1 } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk1 (placed in PIN J2 (CLK2, LVDSCLK1p, Input)) " "Info: Automatically promoted node clk1 (placed in PIN J2 (CLK2, LVDSCLK1p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G3 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G3" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "emit.vhd" "" { Text "D:/software/Altera.Quartus.II.v6.0-SHooTERS/win/pan/cpld/frequency/9-12/emit.vhd" 7 -1 0 } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" "" { Assignment "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" 1 { { 0 "clk1" } } } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clk1 } "NODE_NAME" } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clk1 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clr1 (placed in PIN J1 (CLK3, LVDSCLK1n, Input)) " "Info: Automatically promoted node clr1 (placed in PIN J1 (CLK3, LVDSCLK1n, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G1 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G1" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Q1~44 " "Info: Destination node Q1~44" {  } { { "emit.vhd" "" { Text "D:/software/Altera.Quartus.II.v6.0-SHooTERS/win/pan/cpld/frequency/9-12/emit.vhd" 23 -1 0 } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" "" { Assignment "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" 1 { { 0 "Q1~44" } } } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { Q1~44 } "NODE_NAME" } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { Q1~44 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "emit.vhd" "" { Text "D:/software/Altera.Quartus.II.v6.0-SHooTERS/win/pan/cpld/frequency/9-12/emit.vhd" 6 -1 0 } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" "" { Assignment "d:/software/altera.quartus.ii.v6.0-shooters/win/Assignment Editor.qase" 1 { { 0 "clr1" } } } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clr1 } "NODE_NAME" } } { "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/software/altera.quartus.ii.v6.0-shooters/win/TimingClosureFloorplan.fld" "" "" { clr1 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 1 0}
{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Extra Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" {  } {  } 1 0 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:00 " "Info: Finished register packing: elapsed time is 00:00:00" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "Extra Info: No registers were packed into other blocks" {  } {  } 1 0 "No registers were packed into other blocks" 0 0}  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0}

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