nor2.vhd

来自「《CPLDFPGA嵌入式应用开发技术白金手册》源代码」· VHDL 代码 · 共 14 行

--nor2
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use IEEE.std_logic_arith.all;
entity nor2 is
  port(a,b:in std_logic;
         y:out std_logic);
 end nor2;
architecture behav of nor2 is
   begin
    y<=not (a or b);
  end behav;