3_07pcu

大型risc处理器设计源代码,这是书中的代码 基于流水线的risc cpu设计

        #1;                                                                      f0298
      end                                                                        f0299
    end                                                                          f0300
                                                                                 f0301
    //                                                                           f0302
    // Erase DO_STARTUP, when pipeline is filled                                 f0303
    //                                                                           f0304
    always @(posedge CP)                                                         f0305
      if (WORK_IF) DO_STARTUP = #`DELTA 1'b0;                                    f0306
                                                                                 f0307
  //--------------------------------------------------------------------------   f0308
  //                                                                             f0309
  // Interrupt logic                                                             f0310
  //                                                                             f0311
  // Accept hardware interrupts,                                                 f0312
  // exceptions, and software interrupts;                                        f0313
  // acknowledge accepted hardware interrupts;                                   f0314
  // flush pipeline after hardware interrupt by MA memory access;                f0315
  // request correction of rerun point                                           f0316
  //                                                                             f0317
  //--------------------------------------------------------------------------   f0318
                                                                                 f0319
    //                                                                           f0320
    // With falling edge of clock,                                               f0321
    // take hardware interrupt inputs and                                        f0322
    // disable interrupt acknowledge                                             f0323
    //                                                                           f0324
    always @(negedge CP) begin                                                   f0325
      fork                                                                       f0326
        IRQ_IDREG = #`DELTA IRQ_ID;                                              f0327
        IRQ_REG   = #`DELTA nIRQ;                                                f0328
        nIRA      = #`DELTA 1'b1;                                                f0329
      join                                                                       f0330
    end                                                                          f0331
                                                                                 f0332
    //                                                                           f0333
    // Acknowledge hardware interrupt;                                           f0334
    // if RERUN_MA is set, the interrupt is externally reported as taken,        f0335
    // although a presently executed HWI is further in progress;                 f0336
    // this causes no problem, as after completion                               f0337
    // of the present interrupt, the instruction                                 f0338
    // requesting RERUN_MA will be rerun                                         f0339
    //                                                                           f0340
    always @(posedge CP) begin                                                   f0341
      if (STEP) begin                                                            f0342
        nIRA = #`DELTA (IRQ_REG | ((IF_HWIACT | ~DO_HWI) & ~RERUN_MA));          f0343
      end                                                                        f0344
    end                                                                          f0345
                                                                                 f0346
    //                                                                           f0347
    // DO_HWI (hardware interrupt request to be taken)                           f0348
    //                                                                           f0349
    always @(IRQ_REG or IF_HWIACT or PANIC) begin                                f0350
      DO_HWI = ~IRQ_REG & ~IF_HWIACT & ~PANIC;                                   f0351
    end                                                                          f0352
                                                                                 f0353
    //                                                                           f0354
    // DO_EXC (exception request to be taken)                                    f0355
    //                                                                           f0356
    always @(EXCEPT_RQ or IF_EXCACT or IF_HWIACT or PANIC) begin                 f0357
      DO_EXC = EXCEPT_RQ & ~IF_EXCACT & ~IF_HWIACT & ~PANIC;                     f0358
    end                                                                          f0359
                                                                                 f0360
    //                                                                           f0361
    // DO_SWI (software interrupt request to be taken)                           f0362
    //                                                                           f0363
    always @(SWI_RQ or IF_SWIACT or IF_EXCACT or IF_HWIACT or PANIC) begin       f0364
      DO_SWI = SWI_RQ & ~IF_SWIACT & ~IF_EXCACT & ~IF_HWIACT & ~PANIC;           f0365
    end                                                                          f0366
                                                                                 f0367
    //                                                                           f0368
    // DO_PANIC (violation of interrupt hierarchy)                               f0369
    //                                                                           f0370
    always @(IF_HWIACT or IF_EXCACT or IF_SWIACT or EXCEPT_RQ or SWI_RQ) begin   f0371
      casez({IF_HWIACT, IF_EXCACT, IF_SWIACT, EXCEPT_RQ, SWI_RQ, PANIC})         f0372
        6'b1??1?0: DO_PANIC = 1'b1;          // EXC in HWI                       f0373
        6'b1???10: DO_PANIC = 1'b1;          // SWI in HWI                       f0374
        6'b?1?1?0: DO_PANIC = 1'b1;          // EXC in EXC                       f0375
        6'b?1??10: DO_PANIC = 1'b1;          // SWI in EXC                       f0376
        6'b??1?10: DO_PANIC = 1'b1;          // SWI in SWI                       f0377
        default:   DO_PANIC = 1'b0;                                              f0378
      endcase                                                                    f0379
    end                                                                          f0380
                                                                                 f0381
    //                                                                           f0382
    // Save PANIC state                                                          f0383
    //                                                                           f0384
    always @(posedge CP) begin                                                   f0385
      if (STEP) begin                                                            f0386
        PANIC = PANIC | DO_PANIC;                                                f0387
      end                                                                        f0388
    end                                                                          f0389
                                                                                 f0390
    //                                                                           f0391
    // FLUSH_PIPE                                                                f0392
    //                                                                           f0393
    always @(DO_HWI or IRQ_IDREG or MAU_USES_BUS) begin                          f0394
      casez({DO_HWI, IRQ_IDREG, MAU_USES_BUS})                                   f0395
        5'b100?1: FLUSH_PIPE = 1'b1;   // MAU HWI                                f0396
        5'b10101: FLUSH_PIPE = 1'b1;   // MAU HWI                                f0397
        default:  FLUSH_PIPE = 1'b0;                                             f0398
      endcase                                                                    f0399
    end                                                                          f0400
                                                                                 f0401
    //                                                                           f0402
    // EMERG_FETCH (invalidate present IF instruction)                           f0403
    //                                                                           f0404
    always @(DO_HWI or DO_EXC or DO_PANIC) begin                                 f0405
      EMERG_FETCH = (DO_HWI | DO_EXC | DO_PANIC);                                f0406
    end                                                                          f0407
                                                                                 f0408
    //                                                                           f0409
    // RERUN_MA (MAU HWI after IFU HWI)                                          f0410
    //                                                                           f0411
    always @(IRQ_REG or IRQ_IDREG or MAU_USES_BUS or IF_HWIACT) begin            f0412
      casez({IRQ_REG, IRQ_IDREG, MAU_USES_BUS, IF_HWIACT})                       f0413
        6'b000?11: RERUN_MA = 1'b1;   // MAU HWI                                 f0414
        6'b001011: RERUN_MA = 1'b1;   // MAU HWI                                 f0415
        default:   RERUN_MA = 1'b0;                                              f0416
      endcase                                                                    f0417
    end                                                                          f0418
                                                                                 f0419
  //--------------------------------------------------------------------------   f0420
  //                                                                             f0421
  // PC_BUS logic                                                                f0422
  //                                                                             f0423
  // USE_PCU_PC and PC_BUS                                                       f0424
  //                                                                             f0425
  //--------------------------------------------------------------------------   f0426
                                                                                 f0427
    //                                                                           f0428
    // USE_PCU_PC to IFU                                                         f0429
    //                                                                           f0430
    always @(DO_STARTUP or DO_HWI or DO_PANIC or DO_EXC or DO_SWI or             f0431
             KILL_ALU or DO_RETI or SREG_ACC_DIR or SREG_ADDR)                   f0432
    begin                                                                        f0433
      casez({DO_STARTUP, DO_HWI, DO_PANIC, KILL_ALU, DO_EXC, DO_SWI, DO_RETI,    f0434
             SREG_ACC_DIR, SREG_ADDR})                                           f0435
        12'b1???????????: USE_PCU_PC = 1'b1;  // RESET                           f0436
        12'b01??????????: USE_PCU_PC = 1'b1;  // hardware interrupt              f0437
        12'b001?????????: USE_PCU_PC = 1'b1;  // uncorrectable error (PANIC)     f0438
        12'b00001???????: USE_PCU_PC = 1'b1;  // exception                       f0439
        12'b0000?1??????: USE_PCU_PC = 1'b1;  // software interrupt              f0440
        12'b0000??1?????: USE_PCU_PC = 1'b1;  // RETI                            f0441
        12'b000000010000: USE_PCU_PC = 1'b1;  // SRIS PC                         f0442
        default:          USE_PCU_PC = 1'b0;                                     f0443
      endcase                                                                    f0444
    end                                                                          f0445
                                                                                 f0446