3_05mau

大型risc处理器设计源代码,这是书中的代码 基于流水线的risc cpu设计

                                                                                 d0115
  //                                                                             d0116
  // Byte and halfword selection for read/write accesses using                   d0117
  // access address bits 0,1 (position in data word)                             d0118
  //                                                                             d0119
  // MAPPING: X0: map bits 0-7  from/to bits  0- 7                               d0120
  //          X1: map bits 0-7  from/to bits  8-15                               d0121
  //          0X: map bits 0-15 from/to bits  0-15                               d0122
  //          1X: map bits 0-15 from/to bits 16-31                               d0123
  //                                                                             d0124
  always @(MAU_C3REG or ACCSIZ) begin                                            d0125
    MAPPING[0] = MAU_C3REG[0] & ACCSIZ[0];                                       d0126
    MAPPING[1] = MAU_C3REG[1] & (|ACCSIZ);                                       d0127
  end                                                                            d0128
                                                                                 d0129
  //--------------------------------------------------------------------------   d0130
  //                                                                             d0131
  // Write data selection                                                        d0132
  //                                                                             d0133
  // Put data to be written to MAU_WRITE_DATA                                    d0134
  // according to access width and address                                       d0135
  //                                                                             d0136
  //--------------------------------------------------------------------------   d0137
                                                                                 d0138
    //                                                                           d0139
    // Byte selection in write data                                              d0140
    //                                                                           d0141
    always @(MAU_DBREG or MAPPING[0]) begin                                      d0142
      case(MAPPING[0])                                                           d0143
        1'b0: ST_MAPP08 = {MAU_DBREG[31:16], MAU_DBREG[15:8], MAU_DBREG[7:0]};   d0144
        1'b1: ST_MAPP08 = {MAU_DBREG[31:16], MAU_DBREG[ 7:0], MAU_DBREG[7:0]};   d0145
      endcase                                                                    d0146
    end                                                                          d0147
                                                                                 d0148
    //                                                                           d0149
    // Halfword selection in write data                                          d0150
    //                                                                           d0151
    always @(ST_MAPP08 or MAPPING[1]) begin                                      d0152
      case(MAPPING[1])                                                           d0153
        1'b0: ST_MAPP16 = {ST_MAPP08[31:16], ST_MAPP08[15:0]};                   d0154
        1'b1: ST_MAPP16 = {ST_MAPP08[15: 0], ST_MAPP08[15:0]};                   d0155
      endcase                                                                    d0156
    end                                                                          d0157
                                                                                 d0158
    //                                                                           d0159
    // Put write data to MAU_WRITE_DATA                                          d0160
    //                                                                           d0161
    always @(ST_MAPP16)                                                          d0162
      MAU_WRITE_DATA = ST_MAPP16;                                                d0163
                                                                                 d0164
  //--------------------------------------------------------------------------   d0165
  //                                                                             d0166
  // Read data selection                                                         d0167
  //                                                                             d0168
  // Filter data to be read from MAU_READ_DATA                                   d0169
  // according to access width and address                                       d0170
  //                                                                             d0171
  //--------------------------------------------------------------------------   d0172
                                                                                 d0173
    //                                                                           d0174
    // Halfword selection in read data                                           d0175
    //                                                                           d0176
    always @(MAU_READ_DATA or MAPPING[1]) begin                                  d0177
      case(MAPPING[1])                                                           d0178
        1'b0: LD_MAPP16 = {MAU_READ_DATA[31:16], MAU_READ_DATA[15: 0]};          d0179
        1'b1: LD_MAPP16 = {MAU_READ_DATA[31:16], MAU_READ_DATA[31:16]};          d0180
      endcase                                                                    d0181
    end                                                                          d0182
                                                                                 d0183
    //                                                                           d0184
    // Byte selection in read data                                               d0185
    //                                                                           d0186
    always @(LD_MAPP16 or MAPPING[0]) begin                                      d0187
      case(MAPPING[0])                                                           d0188
        1'b0: LD_MAPP08 = {LD_MAPP16[31:16], LD_MAPP16[15:8], LD_MAPP16[ 7:0]};  d0189
        1'b1: LD_MAPP08 = {LD_MAPP16[31:16], LD_MAPP16[15:8], LD_MAPP16[15:8]};  d0190
      endcase                                                                    d0191
    end                                                                          d0192
                                                                                 d0193
    //                                                                           d0194
    // Filter read data                                                          d0195
    // (set bits outside access width to 0)                                      d0196
    //                                                                           d0197
    always @(LD_MAPP08 or ACCSIZ) begin                                          d0198
      FILTERED = LD_MAPP08 & {{16{~(|ACCSIZ)}}, {8{~ACCSIZ[0]}}, {8{1'b1}}};     d0199
    end                                                                          d0200
                                                                                 d0201
  //                                                                             d0202
  // Sign extension mask                                                         d0203
  //                                                                             d0204
  always @(LD_MAPP08 or ACCSIZ) begin                                            d0205
    case(ACCSIZ)                                                                 d0206
      2'b01:   SIGNMASK = {{24{LD_MAPP08[ 7]}}, {8{1'b0}}};  // byte             d0207
      2'b10:   SIGNMASK = {{16{LD_MAPP08[15]}}, {16{1'b0}}}; // halfword         d0208
      default: SIGNMASK = 32'b0;                             // word             d0209
    endcase                                                                      d0210
  end                                                                            d0211
                                                                                 d0212
  //                                                                             d0213
  // In access operations, combine filtered read data with                       d0214
  // sign mask (only if 'load signed' active) and put to C4_BUS;                 d0215
  //                                                                             d0216
  // when buffering, transfer C3 input register to C4_BUS                        d0217
  //                                                                             d0218
  always @(MAU_OPREG or MAU_C3REG or FILTERED or SIGNMASK) begin                 d0219
    case(MAU_OPREG[2])                                                           d0220
      1'b0: C4_BUS = FILTERED | (SIGNMASK & {32{MAU_OPREG[0]}});                 d0221
      1'b1: C4_BUS = MAU_C3REG;                                                  d0222
    endcase                                                                      d0223
  end                                                                            d0224
                                                                                 d0225
endmodule // mau                                                                 d0226