📄 3_02ifu
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wire ID_ANNUL, // present ANNUL bit a0447
BRANCH, // branch a0448
TYPE, // BCC or CALL, if branch a0449
DS_NOW, // CTR in ID, delay slot in IF a0450
TAKEN, // present branch was taken a0451
KU_MODE, // kernel/user mode a0452
LAST_KU_MODE, // last kernel/user mode a0453
IGNORE_HIT, // ignore cache hit a0454
CCLR, // clear cache a0455
NEW_FLAGS, // instruction in ID changes flags a0456
NO_ACC, // no memory access possible a0457
WORK_IF, // IF is active a0458
DO_IF, // IF was activated a0459
nRESET, // reset a0460
CP; // system clock a0461
a0462
// Internal wiring a0463
wire [31:0] DELAYSLOT; // delay slot from cache a0464
wire [29:0] TARGET, // branch target from cache a0465
LAST_TARGET; // last branch target from PCL a0466
wire [3:0] CCODE, // condition code from cache a0467
LAST_CCODE; // last condition code from PCL a0468
wire [1:0] HIBITS, // history bits from cache a0469
LAST_HIBITS, // last history bits from PCL a0470
NEW_HIBITS; // new history bits from HUL a0471
wire WnR, // write/read signal for cache a0472
UPDATE, // update signal for cache a0473
NOW_TAKEN, // branch from cache to be taken a0474
LAST_TAKEN, // final branch decision a0475
HITAKEN, // branch decision based on HIBITS a0476
LAST_HITAKEN, // last heuristic branch decision a0477
LAST_NEW_FLAGS, // last decision was heuristic a0478
LAST_HIT, // there was a hit a0479
ANNUL, // ANNUL bit from cache a0480
LAST_ANNUL; // last ANNUL bit from PCL a0481
a0482
// Internal registers a0483
reg TAKE; // modified TAKEN from CALL write mux a0484
a0485
// a0486
// Instances a0487
// a0488
a0489
// Read-write logic a0490
rwl RWL (WnR, UPDATE, a0491
CONFIG[1:0], BRANCH, TYPE, LAST_HIT, LAST_TYPE, a0492
NO_ACC, DO_IF, nRESET, CP); a0493
a0494
// Branch cache a0495
bcache BCACHE (BTC_DELAYSLOT, TARGET, CCODE, HIBITS, BTC_HIT, ANNUL, a0496
OPCODE, JPC, LPC, PC, ID_CCODE, NEW_HIBITS, DS_NOW, a0497
ID_ANNUL, TAKE, KU_MODE, LAST_KU_MODE, WnR, UPDATE, a0498
WORK_IF, DO_IF, CCLR, nRESET, CP); a0499
a0500
// Call detection logic a0501
cdl CDL (BTC_TYPE, CCODE, HITAKEN); a0502
a0503
// Branch decision logic a0504
bdl NOW_BDL (NOW_TAKEN, FLAGS_IF, CCODE); a0505
a0506
// History decision logic a0507
hil HIL (HITAKEN, HIBITS); a0508
a0509
// Pipeline control logic a0510
pcl PCL (LAST_TARGET, a0511
LAST_HIT, LAST_ANNUL, LAST_HITAKEN, LAST_NEW_FLAGS, a0512
LAST_HIBITS, LAST_CCODE, LAST_TYPE, a0513
TARGET, BTC_HIT & ~BTC_CORRECT, ANNUL, HITAKEN, NEW_FLAGS, a0514
HIBITS, CCODE, BTC_TYPE, IGNORE_HIT, WORK_IF, CP); a0515
a0516
// Branch correction logic a0517
bcl BCL (BTC_CORRECT, BTC_USE_LAST, BTC_DIS_ALU, a0518
LAST_HIT, LAST_ANNUL, LAST_HITAKEN, LAST_TAKEN, a0519
LAST_NEW_FLAGS, LAST_TYPE); a0520
a0521
// Branch decision logic a0522
bdl LAST_BDL (LAST_TAKEN, FLAGS_FD, LAST_CCODE); a0523
a0524
// History update logic a0525
hul HUL (NEW_HIBITS, LAST_HIBITS, LAST_TAKEN); a0526
a0527
a0528
// a0529
// PC multiplexer a0530
// a0531
// Depending on a necessary branch correction, a0532
// the branch target is selected from cache a0533
// or from last access. a0534
// a0535
always @(BTC_USE_LAST or TARGET or LAST_TARGET) begin a0536
casez(BTC_USE_LAST) a0537
1'b0 : BTC_PC = TARGET; // branch target from cache a0538
1'b1 : BTC_PC = LAST_TARGET; // last branch target a0539
default : BTC_PC = 30'bx; a0540
endcase a0541
end a0542
a0543
// a0544
// Taken multiplexer a0545
// a0546
// If the instruction in the ALU changes the flags, a0547
// indicated by NEW_FLAGS, the branch decision has to be made a0548
// heuristically using the history bits from the cache, a0549
// except for a CALL. If the flags are not changed, a0550
// the decision can be made using the present flags. a0551
// a0552
always @(NEW_FLAGS or BTC_TYPE or HITAKEN or NOW_TAKEN) begin a0553
casez({NEW_FLAGS, BTC_TYPE}) a0554
2'b0? : BTC_TAKEN = NOW_TAKEN; // normal decision a0555
2'b10 : BTC_TAKEN = HITAKEN; // heuristic a0556
2'b11 : BTC_TAKEN = 1'b1; // unconditional (CALL) a0557
default : BTC_TAKEN = 1'bx; a0558
endcase a0559
end a0560
a0561
// a0562
// CALL write multiplexer a0563
// a0564
// A CALL is stored in the cache as a BT, i.e., a0565
// as a conditional branch which is always taken. a0566
// The PCU needs to know whether there is a a0567
// CALL so that the return address can be saved. a0568
// To save one bit per line, the CALL is stored a0569
// as a non-taken BT. Therefore, the signal TAKEN a0570
// has to be changed for the storage of CALLs. a0571
// a0572
always @(TYPE or TAKEN) begin a0573
casez(TYPE) a0574
1'b0 : TAKE = TAKEN; // BCC a0575
1'b1 : TAKE = 1'b0; // CALL a0576
default : TAKE = TAKEN; a0577
endcase a0578
end a0579
a0580
// a0581
// DIS_IDU multiplexer a0582
// a0583
// BTC_DIS_IDU depends on whether there a0584
// is a hit, a correction, or none of both. a0585
// The special case of a hit without final flags a0586
// has to be observed. Then BTC_DIS_IDU is not set. a0587
// Instead, the ALU is turned off in the next step. a0588
// Signal DIS_ALU is generated by BCL. a0589
// a0590
always @(BTC_CORRECT or BTC_HIT or NEW_FLAGS a0591
or ANNUL or BTC_TAKEN) begin a0592
casez({BTC_CORRECT, BTC_HIT, NEW_FLAGS}) a0593
3'b00? : BTC_DIS_IDU = 1'b0; a0594
3'b010 : BTC_DIS_IDU = ANNUL & ~BTC_TAKEN; a0595
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