📄 3_02ifu
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LAST_LDST = #`DELTA LDST_ACC; // 1: IFU could not fetch before a0298
join a0299
end a0300
end a0301
a0302
a0303
// a0304
// I_BUS multiplexer a0305
// a0306
// The instruction for the IDU in the next clock is selected. a0307
// This depends on whether a branch has to be corrected, a0308
// a cache hit did occur, no memory access was possible, a0309
// or there was a normal fetch. a0310
// a0311
always @(BTC_HIT or MPC_HIT or NO_ACC a0312
or ID_INSTR or IFU_DATA_BUS or MPC_INSTR or BTC_DELAYSLOT) begin a0313
casez({BTC_HIT, MPC_HIT, NO_ACC}) a0314
3'b000 : INSTR = IFU_DATA_BUS; // normal fetch a0315
3'b001 : INSTR = ID_INSTR; // no memory access a0316
3'b01? : INSTR = MPC_INSTR; // MPC hit a0317
3'b1?? : INSTR = BTC_DELAYSLOT; // BTC hit a0318
default : INSTR = ID_INSTR; a0319
endcase a0320
end a0321
a0322
// a0323
// IFU_ADDR_BUS multiplexer a0324
// a0325
// The address for the next fetch is selected. a0326
// This depends on whether a PC from PC_BUS is to be taken, a0327
// a branch has to be corrected, there is a BTC hit or a0328
// an MPC hit, whether no memory access was possible, a0329
// or whether a branch was detected. a0330
// a0331
always @(SHIFT or USE_PCU_PC or LAST_USE_PCU_PC or BTC_CORRECT or BTC_HIT a0332
or MPC_HIT or NO_ACC or ID_BRANCH or BTC_TAKEN or BTC_USE_LAST a0333
or TAKEN a0334
or PC or PC_1 or JPC or PC_2 or BTC_PC or LPC_2 a0335
or LAST_PC_BUS or PC_BUS) begin a0336
casez({SHIFT, USE_PCU_PC, LAST_USE_PCU_PC, BTC_CORRECT, a0337
BTC_HIT, MPC_HIT, NO_ACC, ID_BRANCH, BTC_TAKEN, BTC_USE_LAST, a0338
TAKEN}) a0339
11'b0?????????? : NEW_PC = PC; // keep old address a0340
11'b10000000??? : NEW_PC = PC_1; // normal fetch a0341
11'b10000001??0 : NEW_PC = PC_1; // branch not to be taken a0342
11'b100001?0??? : NEW_PC = PC_1; // MPC hit, no branch a0343
11'b100001?1??0 : NEW_PC = PC_1; // MPC hit, do not take branch a0344
11'b10000001??1 : NEW_PC = JPC; // branch to be taken a0345
11'b100001?1??1 : NEW_PC = JPC; // MPC hit, take branch a0346
11'b10001???0?? : NEW_PC = PC_2; // BTC hit, do not take branch a0347
11'b10001???1?? : NEW_PC = BTC_PC; // BTC hit, take branch a0348
11'b1001?????1? : NEW_PC = BTC_PC; // branch correction a0349
11'b1001?????0? : NEW_PC = LPC_2; // branch correction a0350
11'b101???????? : NEW_PC = LAST_PC_BUS; // delayed external PC a0351
11'b11????????? : NEW_PC = PC_BUS; // immediate external PC a0352
default : NEW_PC = PC; a0353
endcase a0354
end a0355
a0356
// a0357
// NPC_BUS multiplexer a0358
// a0359
// a0360
// The NPC_BUS reports the return address a0361
// of a CALL to the PCU depending on a BTC hit. a0362
// a0363
always @(BTC_HIT or LPC_2 or PC_2) begin a0364
casez(BTC_HIT) a0365
1'b0 : NPC_BUS = LPC_2; // no BTC hit a0366
1'b1 : NPC_BUS = PC_2; // BTC hit a0367
endcase a0368
end a0369
endmodule // ifu a0370
a0371
a0372
//---------------------------------------------------------------------------- a0373
// a0374
// Branch-target cache a0375
// a0376
// The BTC stores branches with their delay slot. a0377
// If an address is found in the cache, not the branch, a0378
// but its delay slot is sent to the IFU. This saves one step, a0379
// as the branch does not move through the pipeline. a0380
// The ALU may compute flags relevant for this branch. a0381
// In this case, the branch decision is made heuristically a0382
// and has possibly to be corrected in the next step. a0383
// The BTC contains the corresponding logic. a0384
// a0385
//---------------------------------------------------------------------------- a0386
a0387
module btc ( a0388
BTC_DELAYSLOT, BTC_PC, BTC_HIT, BTC_CORRECT, BTC_USE_LAST, a0389
BTC_DIS_IDU, BTC_DIS_ALU, BTC_TAKEN, BTC_TYPE, a0390
OPCODE, PC, JPC, LPC, FLAGS_IF, FLAGS_FD, ID_CCODE, CONFIG, a0391
ID_ANNUL, BRANCH, TYPE, DS_NOW, TAKEN, KU_MODE, LAST_KU_MODE, a0392
IGNORE_HIT, CCLR, NEW_FLAGS, NO_ACC, WORK_IF, DO_IF, nRESET, CP a0393
); a0394
output [31:0] BTC_DELAYSLOT; // delay slot or last delay slot a0395
output [29:0] BTC_PC; // fetch address from cache or last address a0396
output BTC_HIT, // address in BTC a0397
BTC_CORRECT, // branch correction a0398
BTC_USE_LAST, // use last fetch address a0399
BTC_DIS_IDU, // turn off IDU a0400
BTC_DIS_ALU, // turn off ALU a0401
BTC_TAKEN, // use fetch address a0402
BTC_TYPE; // 0: BCC; 1: CALL a0403
input [31:0] OPCODE; // present instruction a0404
input [29:0] PC, // fetch address a0405
JPC, // present branch target a0406
LPC; // last fetch address a0407
input [3:0] FLAGS_IF, // flags for branch decision a0408
FLAGS_FD, // flags for branch correction a0409
ID_CCODE; // present condition code a0410
input [1:0] CONFIG; // cache mode a0411
input ID_ANNUL, // present ANNUL bit a0412
BRANCH, // branch a0413
TYPE, // BCC or CALL, if branch a0414
DS_NOW, // CTR in ID, delay slot in IF a0415
TAKEN, // present branch was taken a0416
KU_MODE, // kernel/user mode a0417
LAST_KU_MODE, // last kernel/user mode a0418
IGNORE_HIT, // ignore cache hit a0419
CCLR, // clear cache a0420
NEW_FLAGS, // instruction in ID changes flags a0421
NO_ACC, // no memory access possible a0422
WORK_IF, // IF is active a0423
DO_IF, // IF was activated a0424
nRESET, // reset a0425
CP; // system clock a0426
a0427
// Outputs a0428
wire [31:0] BTC_DELAYSLOT; // delay slot or last delay slot a0429
reg [29:0] BTC_PC; // fetch address from cache or last address a0430
wire BTC_HIT, // address in BTC a0431
BTC_CORRECT, // branch correction a0432
BTC_USE_LAST; // use last fetch address a0433
reg BTC_DIS_IDU; // turn off IDU a0434
wire BTC_DIS_ALU; // turn off ALU a0435
reg BTC_TAKEN; // use fetch address a0436
wire BTC_TYPE; // 0: BCC; 1: CALL a0437
a0438
// Inputs a0439
wire [31:0] OPCODE; // present instruction a0440
wire [29:0] PC, // fetch address a0441
JPC, // present branch target a0442
LPC; // last fetch address a0443
wire [3:0] FLAGS, // flags from ALU a0444
ID_CCODE; // present condition code a0445
wire [1:0] CONFIG; // cache mode a0446
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