lvds_rx_inst.v

来自「Altera FPGA CPLD设计高级篇电子书籍」· Verilog 代码 · 共 9 行

lvds_rx	lvds_rx_inst (
	.rx_in ( rx_in_sig ),
	.rx_inclock ( rx_inclock_sig ),
	.rx_data_align ( rx_data_align_sig ),
	.rx_out ( rx_out_sig ),
	.rx_locked ( rx_locked_sig ),
	.rx_outclock ( rx_outclock_sig )
	);