lockit.map.eqn

Altera FPGA CPLD设计高级篇电子书籍

--operation mode is normal

Y5_sft01_n[4] = AMPP_FUNCTION(fir_clock, Y5_sft01_n[5], VCC);


--Y5_sft01_n[3] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft01_n[3]
--operation mode is normal

Y5_sft01_n[3] = AMPP_FUNCTION(fir_clock, Y5_sft01_n[4], VCC, GND);


--Y5_sft01_n[2] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft01_n[2]
--operation mode is normal

Y5_sft01_n[2] = AMPP_FUNCTION(fir_clock, Y5_sft01_n[3], VCC);


--Y5_sft01_n[1] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft01_n[1]
--operation mode is normal

Y5_sft01_n[1] = AMPP_FUNCTION(fir_clock, Y5_sft01_n[2], VCC, GND);


--Y5_sft01_n[0] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft01_n[0]
--operation mode is normal

Y5_sft01_n[0] = AMPP_FUNCTION(fir_clock, Y5_sft01_n[1], VCC, GND);


--Z83L1Q is fir_top:inst2|fir_top_st:fir_top_st_component|sym_add_ser:sym_18_n|data_out[0]~reg0
--operation mode is normal

Z83L1Q = AMPP_FUNCTION(fir_clock, Y5_sft01_n[0], VCC, GND);


--Y5_sft02_n[11] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[11]
--operation mode is normal

Y5_sft02_n[11] = AMPP_FUNCTION(fir_clock, Z83L1Q, VCC);


--Y5_sft02_n[10] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[10]
--operation mode is normal

Y5_sft02_n[10] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[11], VCC, GND);


--Y5_sft02_n[9] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[9]
--operation mode is normal

Y5_sft02_n[9] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[10], VCC, GND);


--Y5_sft02_n[8] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[8]
--operation mode is normal

Y5_sft02_n[8] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[9], VCC, GND);


--Y5_sft02_n[7] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[7]
--operation mode is normal

Y5_sft02_n[7] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[8], VCC, GND);


--Y5_sft02_n[6] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[6]
--operation mode is normal

Y5_sft02_n[6] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[7], VCC, GND);


--Y5_sft02_n[5] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[5]
--operation mode is normal

Y5_sft02_n[5] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[6], VCC);


--Y5_sft02_n[4] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[4]
--operation mode is normal

Y5_sft02_n[4] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[5], VCC, GND);


--Y5_sft02_n[3] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[3]
--operation mode is normal

Y5_sft02_n[3] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[4], VCC, GND);


--Y5_sft02_n[2] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[2]
--operation mode is normal

Y5_sft02_n[2] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[3], VCC);


--Y5_sft02_n[1] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[1]
--operation mode is normal

Y5_sft02_n[1] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[2], VCC);


--Y5_sft02_n[0] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[0]
--operation mode is normal

Y5_sft02_n[0] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[1], VCC);


--Y5_sft03_n[12] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[12]
--operation mode is normal

Y5_sft03_n[12] = AMPP_FUNCTION(fir_clock, Y5_sft02_n[0], VCC, GND);


--Y5_sft03_n[11] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[11]
--operation mode is normal

Y5_sft03_n[11] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[12], VCC, GND);


--Y5_sft03_n[10] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[10]
--operation mode is normal

Y5_sft03_n[10] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[11], VCC, GND);


--Y5_sft03_n[9] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[9]
--operation mode is normal

Y5_sft03_n[9] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[10], VCC, GND);


--Y5_sft03_n[8] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[8]
--operation mode is normal

Y5_sft03_n[8] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[9], VCC, GND);


--Y5_sft03_n[7] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[7]
--operation mode is normal

Y5_sft03_n[7] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[8], VCC);


--Y5_sft03_n[6] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[6]
--operation mode is normal

Y5_sft03_n[6] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[7], VCC);


--Y5_sft03_n[5] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[5]
--operation mode is normal

Y5_sft03_n[5] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[6], VCC);


--Y5_sft03_n[4] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[4]
--operation mode is normal

Y5_sft03_n[4] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[5], VCC);


--Y5_sft03_n[3] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[3]
--operation mode is normal

Y5_sft03_n[3] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[4], VCC);


--Y5_sft03_n[2] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[2]
--operation mode is normal

Y5_sft03_n[2] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[3], VCC, GND);


--Y5_sft03_n[1] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[1]
--operation mode is normal

Y5_sft03_n[1] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[2], VCC);


--Y5_sft03_n[0] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[0]
--operation mode is normal

Y5_sft03_n[0] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[1], VCC);


--Y5_sft04_n[12] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[12]
--operation mode is normal

Y5_sft04_n[12] = AMPP_FUNCTION(fir_clock, Y5_sft03_n[0], VCC, GND);


--Y5_sft04_n[11] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[11]
--operation mode is normal

Y5_sft04_n[11] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[12], VCC, GND);


--Y5_sft04_n[10] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[10]
--operation mode is normal

Y5_sft04_n[10] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[11], VCC, GND);


--Y5_sft04_n[9] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[9]
--operation mode is normal

Y5_sft04_n[9] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[10], VCC);


--Y5_sft04_n[8] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[8]
--operation mode is normal

Y5_sft04_n[8] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[9], VCC);


--Y5_sft04_n[7] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[7]
--operation mode is normal

Y5_sft04_n[7] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[8], VCC, GND);


--Y5_sft04_n[6] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[6]
--operation mode is normal

Y5_sft04_n[6] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[7], VCC, GND);


--Y5_sft04_n[5] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[5]
--operation mode is normal

Y5_sft04_n[5] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[6], VCC, GND);


--Y5_sft04_n[4] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[4]
--operation mode is normal

Y5_sft04_n[4] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[5], VCC);


--Y5_sft04_n[3] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[3]
--operation mode is normal

Y5_sft04_n[3] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[4], VCC);


--Y5_sft04_n[2] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[2]
--operation mode is normal

Y5_sft04_n[2] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[3], VCC);


--Y5_sft04_n[1] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[1]
--operation mode is normal

Y5_sft04_n[1] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[2], VCC);


--Y5_sft04_n[0] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[0]
--operation mode is normal

Y5_sft04_n[0] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[1], VCC, GND);


--Y5_sft05_n[12] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[12]
--operation mode is normal

Y5_sft05_n[12] = AMPP_FUNCTION(fir_clock, Y5_sft04_n[0], VCC, GND);


--Y5_sft05_n[11] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[11]
--operation mode is normal

Y5_sft05_n[11] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[12], VCC, GND);


--Y5_sft05_n[10] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[10]
--operation mode is normal

Y5_sft05_n[10] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[11], VCC);


--Y5_sft05_n[9] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[9]
--operation mode is normal

Y5_sft05_n[9] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[10], VCC);


--Y5_sft05_n[8] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[8]
--operation mode is normal

Y5_sft05_n[8] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[9], VCC, GND);


--Y5_sft05_n[7] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[7]
--operation mode is normal

Y5_sft05_n[7] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[8], VCC, GND);


--Y5_sft05_n[6] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[6]
--operation mode is normal

Y5_sft05_n[6] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[7], VCC, GND);


--Y5_sft05_n[5] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[5]
--operation mode is normal

Y5_sft05_n[5] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[6], VCC, GND);


--Y5_sft05_n[4] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[4]
--operation mode is normal

Y5_sft05_n[4] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[5], VCC, GND);


--Y5_sft05_n[3] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[3]
--operation mode is normal

Y5_sft05_n[3] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[4], VCC);


--Y5_sft05_n[2] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[2]
--operation mode is normal

Y5_sft05_n[2] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[3], VCC);


--Y5_sft05_n[1] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[1]
--operation mode is normal

Y5_sft05_n[1] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[2], VCC);


--Y5_sft05_n[0] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[0]
--operation mode is normal

Y5_sft05_n[0] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[1], VCC, GND);


--Y5_sft06_n[12] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[12]
--operation mode is normal

Y5_sft06_n[12] = AMPP_FUNCTION(fir_clock, Y5_sft05_n[0], VCC, GND);


--Y5_sft06_n[11] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[11]
--operation mode is normal

Y5_sft06_n[11] = AMPP_FUNCTION(fir_clock, Y5_sft06_n[12], VCC, GND);


--Y5_sft06_n[10] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[10]
--operation mode is normal

Y5_sft06_n[10] = AMPP_FUNCTION(fir_clock, Y5_sft06_n[11], VCC, GND);


--Y5_sft06_n[9] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[9]
--operation mode is normal

Y5_sft06_n[9] = AMPP_FUNCTION(fir_clock, Y5_sft06_n[10], VCC);


--Y5_sft06_n[8] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[8]
--operation mode is normal

Y5_sft06_n[8] = AMPP_FUNCTION(fir_clock, Y5_sft06_n[9], VCC);


--Y5_sft06_n[7] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[7]
--operation mode is normal

Y5_sft06_n[7] = AMPP_FUNCTION(fir_clock, Y5_sft06_n[8], VCC, GND);


--Y5_sft06_n[6] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[6]
--operation mode is normal

Y5_sft06_n[6] = AMPP_FUNCTION(fir_clock, Y5_sft06_n[7], VCC, GND);


--Y5_sft06_n[5] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[5]
--operation mode is normal

Y5_sft06_n[5] = AMPP_FUNCTION(fir_clock, Y5_sft06_n[6], VCC, GND);


--Y5_sft06_n[4] is fir_top:inst2|fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[4]
--operation mode is no