fir_top.map.eqn

Altera FPGA CPLD设计高级篇电子书籍

--operation mode is normal

L1_sft10_n[0] = AMPP_FUNCTION(clock, L1_sft10_n[1], VCC);


--M31_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_12_n|c_out
--operation mode is normal

M31_c_out = AMPP_FUNCTION(clock, M31_c_out, L2_sft07_n[0], L1_sft11_n[0], G1_tdl_wait[12], VCC);


--L2_sft07_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft07_n[0]
--operation mode is normal

L2_sft07_n[0] = AMPP_FUNCTION(clock, L2_sft07_n[1], VCC);


--L1_sft11_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft11_n[0]
--operation mode is normal

L1_sft11_n[0] = AMPP_FUNCTION(clock, L1_sft11_n[1], VCC);


--M41_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_13_n|c_out
--operation mode is normal

M41_c_out = AMPP_FUNCTION(clock, M41_c_out, L2_sft06_n[0], L1_sft12_n[0], G1_tdl_wait[12], VCC);


--L2_sft06_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[0]
--operation mode is normal

L2_sft06_n[0] = AMPP_FUNCTION(clock, L2_sft06_n[1], VCC);


--L1_sft12_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft12_n[0]
--operation mode is normal

L1_sft12_n[0] = AMPP_FUNCTION(clock, L1_sft12_n[1], VCC);


--M51_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_14_n|c_out
--operation mode is normal

M51_c_out = AMPP_FUNCTION(clock, M51_c_out, L2_sft05_n[0], L1_sft13_n[0], G1_tdl_wait[12], VCC);


--L2_sft05_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[0]
--operation mode is normal

L2_sft05_n[0] = AMPP_FUNCTION(clock, L2_sft05_n[1], VCC);


--L1_sft13_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft13_n[0]
--operation mode is normal

L1_sft13_n[0] = AMPP_FUNCTION(clock, L1_sft13_n[1], VCC);


--M61_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_15_n|c_out
--operation mode is normal

M61_c_out = AMPP_FUNCTION(clock, M61_c_out, L2_sft04_n[0], L1_sft14_n[0], G1_tdl_wait[12], VCC);


--L2_sft04_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[0]
--operation mode is normal

L2_sft04_n[0] = AMPP_FUNCTION(clock, L2_sft04_n[1], VCC);


--L1_sft14_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft14_n[0]
--operation mode is normal

L1_sft14_n[0] = AMPP_FUNCTION(clock, L1_sft14_n[1], VCC);


--M1_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_0_n|c_out
--operation mode is normal

M1_c_out = AMPP_FUNCTION(clock, M1_c_out, L3_sft03_n[0], K1_add_dly2[1], G1_tdl_wait[12], VCC);


--L3_sft03_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_2_n|sft03_n[0]
--operation mode is normal

L3_sft03_n[0] = AMPP_FUNCTION(clock, L3_sft03_n[1], VCC);


--K1_add_dly2[1] is fir_top_st:fir_top_st_component|par_ld_ser_tdl_nc:Utdl_0_a|add_dly2[1]
--operation mode is normal

K1_add_dly2[1] = AMPP_FUNCTION(clock, K1_data_reg[0], VCC);


--M2_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_1_n|c_out
--operation mode is normal

M2_c_out = AMPP_FUNCTION(clock, M2_c_out, L3_sft02_n[0], L1_sft00_n[0], G1_tdl_wait[12], VCC);


--L3_sft02_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_2_n|sft02_n[0]
--operation mode is normal

L3_sft02_n[0] = AMPP_FUNCTION(clock, L3_sft02_n[1], VCC);


--L1_sft00_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft00_n[0]
--operation mode is normal

L1_sft00_n[0] = AMPP_FUNCTION(clock, L1_sft00_n[1], VCC);


--M3_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_2_n|c_out
--operation mode is normal

M3_c_out = AMPP_FUNCTION(clock, M3_c_out, L3_sft01_n[0], L1_sft01_n[0], G1_tdl_wait[12], VCC);


--L3_sft01_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_2_n|sft01_n[0]
--operation mode is normal

L3_sft01_n[0] = AMPP_FUNCTION(clock, L3_sft01_n[1], VCC);


--L1_sft01_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft01_n[0]
--operation mode is normal

L1_sft01_n[0] = AMPP_FUNCTION(clock, L1_sft01_n[1], VCC);


--M4_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_3_n|c_out
--operation mode is normal

M4_c_out = AMPP_FUNCTION(clock, M4_c_out, L3_sft00_n[0], L1_sft02_n[0], G1_tdl_wait[12], VCC);


--L3_sft00_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_2_n|sft00_n[0]
--operation mode is normal

L3_sft00_n[0] = AMPP_FUNCTION(clock, L3_sft00_n[1], VCC);


--L1_sft02_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft02_n[0]
--operation mode is normal

L1_sft02_n[0] = AMPP_FUNCTION(clock, L1_sft02_n[1], VCC);


--M5_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_4_n|c_out
--operation mode is normal

M5_c_out = AMPP_FUNCTION(clock, M5_c_out, L2_sft15_n[0], L1_sft03_n[0], G1_tdl_wait[12], VCC);


--L2_sft15_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft15_n[0]
--operation mode is normal

L2_sft15_n[0] = AMPP_FUNCTION(clock, L2_sft15_n[1], VCC);


--L1_sft03_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft03_n[0]
--operation mode is normal

L1_sft03_n[0] = AMPP_FUNCTION(clock, L1_sft03_n[1], VCC);


--M6_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_5_n|c_out
--operation mode is normal

M6_c_out = AMPP_FUNCTION(clock, M6_c_out, L2_sft14_n[0], L1_sft04_n[0], G1_tdl_wait[12], VCC);


--L2_sft14_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft14_n[0]
--operation mode is normal

L2_sft14_n[0] = AMPP_FUNCTION(clock, L2_sft14_n[1], VCC);


--L1_sft04_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft04_n[0]
--operation mode is normal

L1_sft04_n[0] = AMPP_FUNCTION(clock, L1_sft04_n[1], VCC);


--M7_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_6_n|c_out
--operation mode is normal

M7_c_out = AMPP_FUNCTION(clock, M7_c_out, L2_sft13_n[0], L1_sft05_n[0], G1_tdl_wait[12], VCC);


--L2_sft13_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft13_n[0]
--operation mode is normal

L2_sft13_n[0] = AMPP_FUNCTION(clock, L2_sft13_n[1], VCC);


--L1_sft05_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft05_n[0]
--operation mode is normal

L1_sft05_n[0] = AMPP_FUNCTION(clock, L1_sft05_n[1], VCC);


--M8_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_7_n|c_out
--operation mode is normal

M8_c_out = AMPP_FUNCTION(clock, M8_c_out, L2_sft12_n[0], L1_sft06_n[0], G1_tdl_wait[12], VCC);


--L2_sft12_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft12_n[0]
--operation mode is normal

L2_sft12_n[0] = AMPP_FUNCTION(clock, L2_sft12_n[1], VCC);


--L1_sft06_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft06_n[0]
--operation mode is normal

L1_sft06_n[0] = AMPP_FUNCTION(clock, L1_sft06_n[1], VCC);


--L2_sft03_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[1]
--operation mode is normal

L2_sft03_n[1] = AMPP_FUNCTION(clock, L2_sft03_n[2], VCC);


--L1_sft15_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft15_n[1]
--operation mode is normal

L1_sft15_n[1] = AMPP_FUNCTION(clock, L1_sft15_n[2], VCC);


--L2_sft00_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft00_n[1]
--operation mode is normal

L2_sft00_n[1] = AMPP_FUNCTION(clock, L2_sft00_n[2], VCC);


--L2_sft02_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[1]
--operation mode is normal

L2_sft02_n[1] = AMPP_FUNCTION(clock, L2_sft02_n[2], VCC);


--L2_sft01_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft01_n[1]
--operation mode is normal

L2_sft01_n[1] = AMPP_FUNCTION(clock, L2_sft01_n[2], VCC);


--L2_sft11_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft11_n[1]
--operation mode is normal

L2_sft11_n[1] = AMPP_FUNCTION(clock, L2_sft11_n[2], VCC);


--L1_sft07_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft07_n[1]
--operation mode is normal

L1_sft07_n[1] = AMPP_FUNCTION(clock, L1_sft07_n[2], VCC);


--L2_sft10_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft10_n[1]
--operation mode is normal

L2_sft10_n[1] = AMPP_FUNCTION(clock, L2_sft10_n[2], VCC);


--L1_sft08_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft08_n[1]
--operation mode is normal

L1_sft08_n[1] = AMPP_FUNCTION(clock, L1_sft08_n[2], VCC);


--L2_sft09_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft09_n[1]
--operation mode is normal

L2_sft09_n[1] = AMPP_FUNCTION(clock, L2_sft09_n[2], VCC);


--L1_sft09_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft09_n[1]
--operation mode is normal

L1_sft09_n[1] = AMPP_FUNCTION(clock, L1_sft09_n[2], VCC);


--L2_sft08_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft08_n[1]
--operation mode is normal

L2_sft08_n[1] = AMPP_FUNCTION(clock, L2_sft08_n[2], VCC);


--L1_sft10_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft10_n[1]
--operation mode is normal

L1_sft10_n[1] = AMPP_FUNCTION(clock, L1_sft10_n[2], VCC);


--L2_sft07_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft07_n[1]
--operation mode is normal

L2_sft07_n[1] = AMPP_FUNCTION(clock, L2_sft07_n[2], VCC);


--L1_sft11_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft11_n[1]
--operation mode is normal

L1_sft11_n[1] = AMPP_FUNCTION(clock, L1_sft11_n[2], VCC);


--L2_sft06_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft06_n[1]
--operation mode is normal

L2_sft06_n[1] = AMPP_FUNCTION(clock, L2_sft06_n[2], VCC);


--L1_sft12_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft12_n[1]
--operation mode is normal

L1_sft12_n[1] = AMPP_FUNCTION(clock, L1_sft12_n[2], VCC);


--L2_sft05_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft05_n[1]
--operation mode is normal

L2_sft05_n[1] = AMPP_FUNCTION(clock, L2_sft05_n[2], VCC);


--L1_sft13_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft13_n[1]
--operation mode is normal

L1_sft13_n[1] = AMPP_FUNCTION(clock, L1_sft13_n[2], VCC);


--L2_sft04_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft04_n[1]
--operation mode is normal

L2_sft04_n[1] = AMPP_FUNCTION(clock, L2_sft04_n[2], VCC);


--L1_sft14_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft14_n[1]
--operation mode is normal

L1_sft14_n[1] = AMPP_FUNCTION(clock, L1_sft14_n[2], VCC);


--L3_sft03_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_2_n|sft03_n[1]
--operation mode is normal

L3_sft03_n[1] = AMPP_FUNCTION(clock, L3_sft03_n[2], VCC);


--K1_data_reg[0] is fir_top_st:fir_top_st_component|par_ld_ser_tdl_nc:Utdl_0_a|data_reg[0]
--operation mode is normal

K1_data_reg[0] = AMPP_FUNCTION(clock, data_in[0], K1_data_reg[1], G1_tdl_wait[0], VCC);


--L3_sft02_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_2_n|sft02_n[1]
--operation mode is normal

L3_sft02_n[1] = AMPP_FUNCTION(clock, L3_sft02_n[2], VCC);


--L1_sft00_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft00_n[1]
--operation mode is normal

L1_sft00_n[1] = AMPP_FUNCTION(clock, L1_sft00_n[2], VCC);


--L3_sft01_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_2_n|sft01_n[1]
--operation mode is normal

L3_sft01_n[1] = AMPP_FUNCTION(clock, L3_sft01_n[2], VCC);


--L1_sft01_n[1] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft01_n[1]
--operation mode is normal

L1_sft01_n[1] = AMPP_FUNCTION(clock, L1_sft01_n[2], VC