fir_top.map.eqn

Altera FPGA CPLD设计高级篇电子书籍

--operation mode is normal

F1_a_reg[1] = AMPP_FUNCTION(clock, C3L3Q, VCC);


--F1_a_reg[0] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[0]
--operation mode is normal

F1_a_reg[0] = AMPP_FUNCTION(clock, C3L1Q, VCC);


--G1_tdl_wait[0] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[0]
--operation mode is normal

G1_tdl_wait[0] = AMPP_FUNCTION(clock, G1_tdl_wait[1], !rst);


--G1_tdl_wait[11] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[11]
--operation mode is normal

G1_tdl_wait[11] = AMPP_FUNCTION(clock, G1_tdl_wait[12], !rst);


--G1L1 is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|i~83
--operation mode is normal

G1L1 = AMPP_FUNCTION(G1_tdl_wait[11], G1_tdl_wait[6], G1_tdl_wait[5], G1_tdl_wait[12]);


--G1_tdl_wait[7] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[7]
--operation mode is normal

G1_tdl_wait[7] = AMPP_FUNCTION(clock, G1_tdl_wait[8], !rst);


--G1_tdl_wait[8] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[8]
--operation mode is normal

G1_tdl_wait[8] = AMPP_FUNCTION(clock, G1_tdl_wait[9], !rst);


--G1_tdl_wait[9] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[9]
--operation mode is normal

G1_tdl_wait[9] = AMPP_FUNCTION(clock, G1_tdl_wait[10], !rst);


--G1_tdl_wait[10] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[10]
--operation mode is normal

G1_tdl_wait[10] = AMPP_FUNCTION(clock, G1_tdl_wait[11], !rst);


--G1L2 is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|i~84
--operation mode is normal

G1L2 = AMPP_FUNCTION(G1_tdl_wait[7], G1_tdl_wait[8], G1_tdl_wait[9], G1_tdl_wait[10]);


--G1_tdl_wait[2] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[2]
--operation mode is normal

G1_tdl_wait[2] = AMPP_FUNCTION(clock, G1_tdl_wait[3], !rst);


--G1_tdl_wait[3] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[3]
--operation mode is normal

G1_tdl_wait[3] = AMPP_FUNCTION(clock, G1_tdl_wait[4], !rst);


--G1_tdl_wait[4] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[4]
--operation mode is normal

G1_tdl_wait[4] = AMPP_FUNCTION(clock, G1_tdl_wait[5], !rst);


--G1_tdl_wait[1] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[1]
--operation mode is normal

G1_tdl_wait[1] = AMPP_FUNCTION(clock, G1_tdl_wait[2], !rst);


--G1L3 is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|i~85
--operation mode is normal

G1L3 = AMPP_FUNCTION(G1_tdl_wait[2], G1_tdl_wait[3], G1_tdl_wait[4], G1_tdl_wait[1]);


--C2L21Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[12]~reg0
--operation mode is normal

C2L21Q = AMPP_FUNCTION(clock, S1_q_b[11], VCC);


--C2L11Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[10]~reg0
--operation mode is normal

C2L11Q = AMPP_FUNCTION(clock, S1_q_b[10], VCC);


--C2L01Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[9]~reg0
--operation mode is normal

C2L01Q = AMPP_FUNCTION(clock, S1_q_b[9], VCC);


--C2L9Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[8]~reg0
--operation mode is normal

C2L9Q = AMPP_FUNCTION(clock, S1_q_b[8], VCC);


--C2L8Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[7]~reg0
--operation mode is normal

C2L8Q = AMPP_FUNCTION(clock, S1_q_b[7], VCC);


--C2L7Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[6]~reg0
--operation mode is normal

C2L7Q = AMPP_FUNCTION(clock, S1_q_b[6], VCC);


--C2L6Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[5]~reg0
--operation mode is normal

C2L6Q = AMPP_FUNCTION(clock, S1_q_b[5], VCC);


--C2L5Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[4]~reg0
--operation mode is normal

C2L5Q = AMPP_FUNCTION(clock, S1_q_b[4], VCC);


--C2L4Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[3]~reg0
--operation mode is normal

C2L4Q = AMPP_FUNCTION(clock, S1_q_b[3], VCC);


--C2L3Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[2]~reg0
--operation mode is normal

C2L3Q = AMPP_FUNCTION(clock, S1_q_b[2], VCC);


--C2L2Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[1]~reg0
--operation mode is normal

C2L2Q = AMPP_FUNCTION(clock, S1_q_b[1], VCC);


--C2L1Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_1_n|res[0]~reg0
--operation mode is normal

C2L1Q = AMPP_FUNCTION(clock, S1_q_b[0], VCC);


--M71L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_16_n|data_out[0]~reg0
--operation mode is normal

M71L2Q = AMPP_FUNCTION(clock, M71_c_out, L2_sft03_n[0], L1_sft15_n[0], VCC);


--M81L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_17_n|data_out[0]~reg0
--operation mode is normal

M81L2Q = AMPP_FUNCTION(clock, M81_c_out, L2_sft00_n[0], L2_sft02_n[0], VCC);


--M91L1Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_18_n|data_out[0]~reg0
--operation mode is normal

M91L1Q = AMPP_FUNCTION(clock, L2_sft01_n[0], VCC);


--M9L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_8_n|data_out[0]~reg0
--operation mode is normal

M9L2Q = AMPP_FUNCTION(clock, M9_c_out, L2_sft11_n[0], L1_sft07_n[0], VCC);


--M01L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_9_n|data_out[0]~reg0
--operation mode is normal

M01L2Q = AMPP_FUNCTION(clock, M01_c_out, L2_sft10_n[0], L1_sft08_n[0], VCC);


--M11L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_10_n|data_out[0]~reg0
--operation mode is normal

M11L2Q = AMPP_FUNCTION(clock, M11_c_out, L2_sft09_n[0], L1_sft09_n[0], VCC);


--M21L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_11_n|data_out[0]~reg0
--operation mode is normal

M21L2Q = AMPP_FUNCTION(clock, M21_c_out, L2_sft08_n[0], L1_sft10_n[0], VCC);


--M31L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_12_n|data_out[0]~reg0
--operation mode is normal

M31L2Q = AMPP_FUNCTION(clock, M31_c_out, L2_sft07_n[0], L1_sft11_n[0], VCC);


--M41L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_13_n|data_out[0]~reg0
--operation mode is normal

M41L2Q = AMPP_FUNCTION(clock, M41_c_out, L2_sft06_n[0], L1_sft12_n[0], VCC);


--M51L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_14_n|data_out[0]~reg0
--operation mode is normal

M51L2Q = AMPP_FUNCTION(clock, M51_c_out, L2_sft05_n[0], L1_sft13_n[0], VCC);


--M61L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_15_n|data_out[0]~reg0
--operation mode is normal

M61L2Q = AMPP_FUNCTION(clock, M61_c_out, L2_sft04_n[0], L1_sft14_n[0], VCC);


--M1L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_0_n|data_out[0]~reg0
--operation mode is normal

M1L2Q = AMPP_FUNCTION(clock, M1_c_out, L3_sft03_n[0], K1_add_dly2[1], VCC);


--M2L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_1_n|data_out[0]~reg0
--operation mode is normal

M2L2Q = AMPP_FUNCTION(clock, M2_c_out, L3_sft02_n[0], L1_sft00_n[0], VCC);


--M3L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_2_n|data_out[0]~reg0
--operation mode is normal

M3L2Q = AMPP_FUNCTION(clock, M3_c_out, L3_sft01_n[0], L1_sft01_n[0], VCC);


--M4L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_3_n|data_out[0]~reg0
--operation mode is normal

M4L2Q = AMPP_FUNCTION(clock, M4_c_out, L3_sft00_n[0], L1_sft02_n[0], VCC);


--M5L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_4_n|data_out[0]~reg0
--operation mode is normal

M5L2Q = AMPP_FUNCTION(clock, M5_c_out, L2_sft15_n[0], L1_sft03_n[0], VCC);


--M6L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_5_n|data_out[0]~reg0
--operation mode is normal

M6L2Q = AMPP_FUNCTION(clock, M6_c_out, L2_sft14_n[0], L1_sft04_n[0], VCC);


--M7L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_6_n|data_out[0]~reg0
--operation mode is normal

M7L2Q = AMPP_FUNCTION(clock, M7_c_out, L2_sft13_n[0], L1_sft05_n[0], VCC);


--M8L2Q is fir_top_st:fir_top_st_component|sym_add_ser:sym_7_n|data_out[0]~reg0
--operation mode is normal

M8L2Q = AMPP_FUNCTION(clock, M8_c_out, L2_sft12_n[0], L1_sft06_n[0], VCC);


--M71_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_16_n|c_out
--operation mode is normal

M71_c_out = AMPP_FUNCTION(clock, M71_c_out, L2_sft03_n[0], L1_sft15_n[0], G1_tdl_wait[12], VCC);


--L2_sft03_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft03_n[0]
--operation mode is normal

L2_sft03_n[0] = AMPP_FUNCTION(clock, L2_sft03_n[1], VCC);


--L1_sft15_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft15_n[0]
--operation mode is normal

L1_sft15_n[0] = AMPP_FUNCTION(clock, L1_sft15_n[1], VCC);


--M81_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_17_n|c_out
--operation mode is normal

M81_c_out = AMPP_FUNCTION(clock, M81_c_out, L2_sft00_n[0], L2_sft02_n[0], G1_tdl_wait[12], VCC);


--L2_sft00_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft00_n[0]
--operation mode is normal

L2_sft00_n[0] = AMPP_FUNCTION(clock, L2_sft00_n[1], VCC);


--L2_sft02_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft02_n[0]
--operation mode is normal

L2_sft02_n[0] = AMPP_FUNCTION(clock, L2_sft02_n[1], VCC);


--L2_sft01_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft01_n[0]
--operation mode is normal

L2_sft01_n[0] = AMPP_FUNCTION(clock, L2_sft01_n[1], VCC);


--M9_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_8_n|c_out
--operation mode is normal

M9_c_out = AMPP_FUNCTION(clock, M9_c_out, L2_sft11_n[0], L1_sft07_n[0], G1_tdl_wait[12], VCC);


--L2_sft11_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft11_n[0]
--operation mode is normal

L2_sft11_n[0] = AMPP_FUNCTION(clock, L2_sft11_n[1], VCC);


--L1_sft07_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft07_n[0]
--operation mode is normal

L1_sft07_n[0] = AMPP_FUNCTION(clock, L1_sft07_n[1], VCC);


--M01_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_9_n|c_out
--operation mode is normal

M01_c_out = AMPP_FUNCTION(clock, M01_c_out, L2_sft10_n[0], L1_sft08_n[0], G1_tdl_wait[12], VCC);


--L2_sft10_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft10_n[0]
--operation mode is normal

L2_sft10_n[0] = AMPP_FUNCTION(clock, L2_sft10_n[1], VCC);


--L1_sft08_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft08_n[0]
--operation mode is normal

L1_sft08_n[0] = AMPP_FUNCTION(clock, L1_sft08_n[1], VCC);


--M11_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_10_n|c_out
--operation mode is normal

M11_c_out = AMPP_FUNCTION(clock, M11_c_out, L2_sft09_n[0], L1_sft09_n[0], G1_tdl_wait[12], VCC);


--L2_sft09_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft09_n[0]
--operation mode is normal

L2_sft09_n[0] = AMPP_FUNCTION(clock, L2_sft09_n[1], VCC);


--L1_sft09_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft09_n[0]
--operation mode is normal

L1_sft09_n[0] = AMPP_FUNCTION(clock, L1_sft09_n[1], VCC);


--M21_c_out is fir_top_st:fir_top_st_component|sym_add_ser:sym_11_n|c_out
--operation mode is normal

M21_c_out = AMPP_FUNCTION(clock, M21_c_out, L2_sft08_n[0], L1_sft10_n[0], G1_tdl_wait[12], VCC);


--L2_sft08_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_1_n|sft08_n[0]
--operation mode is normal

L2_sft08_n[0] = AMPP_FUNCTION(clock, L2_sft08_n[1], VCC);


--L1_sft10_n[0] is fir_top_st:fir_top_st_component|lc_tdl_strat:Utdl_0_n|sft10_n[0]