fir_top.map.eqn

Altera FPGA CPLD设计高级篇电子书籍

--F1_a_inv_mx[12] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[12]
--operation mode is arithmetic

F1_a_inv_mx[12] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L52Q, VCC, F1L62);

--F1L82 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[12]~COUT
--operation mode is arithmetic

F1L82 = AMPP_FUNCTION(G1_tdl_wait[7], C3L52Q, F1L62);


--F1_a_inv_mx[13] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[13]
--operation mode is arithmetic

F1_a_inv_mx[13] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L72Q, VCC, F1L82);

--F1L03 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[13]~COUT
--operation mode is arithmetic

F1L03 = AMPP_FUNCTION(G1_tdl_wait[7], C3L72Q, F1L82);


--F1_a_inv_mx[14] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[14]
--operation mode is arithmetic

F1_a_inv_mx[14] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L92Q, VCC, F1L03);

--F1L23 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[14]~COUT
--operation mode is arithmetic

F1L23 = AMPP_FUNCTION(G1_tdl_wait[7], C3L92Q, F1L03);


--F1_a_inv_mx[15] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[15]
--operation mode is normal

F1_a_inv_mx[15] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L92Q, VCC, F1L23);


--J1L72Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[26]~reg0
--operation mode is normal

J1L72Q = AMPP_FUNCTION(clock, F1_accum[14], VCC, G1_tdl_wait[5]);


--J1L62Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[25]~reg0
--operation mode is normal

J1L62Q = AMPP_FUNCTION(clock, F1_accum[13], VCC, G1_tdl_wait[5]);


--J1L52Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[24]~reg0
--operation mode is normal

J1L52Q = AMPP_FUNCTION(clock, F1_accum[12], VCC, G1_tdl_wait[5]);


--J1L42Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[23]~reg0
--operation mode is normal

J1L42Q = AMPP_FUNCTION(clock, F1_accum[11], VCC, G1_tdl_wait[5]);


--J1L32Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[22]~reg0
--operation mode is normal

J1L32Q = AMPP_FUNCTION(clock, F1_accum[10], VCC, G1_tdl_wait[5]);


--J1L22Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[21]~reg0
--operation mode is normal

J1L22Q = AMPP_FUNCTION(clock, F1_accum[9], VCC, G1_tdl_wait[5]);


--J1L12Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[20]~reg0
--operation mode is normal

J1L12Q = AMPP_FUNCTION(clock, F1_accum[8], VCC, G1_tdl_wait[5]);


--J1L02Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[19]~reg0
--operation mode is normal

J1L02Q = AMPP_FUNCTION(clock, F1_accum[7], VCC, G1_tdl_wait[5]);


--J1L91Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[18]~reg0
--operation mode is normal

J1L91Q = AMPP_FUNCTION(clock, F1_accum[6], VCC, G1_tdl_wait[5]);


--J1L81Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[17]~reg0
--operation mode is normal

J1L81Q = AMPP_FUNCTION(clock, F1_accum[5], VCC, G1_tdl_wait[5]);


--J1L71Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[16]~reg0
--operation mode is normal

J1L71Q = AMPP_FUNCTION(clock, F1_accum[4], VCC, G1_tdl_wait[5]);


--J1L61Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[15]~reg0
--operation mode is normal

J1L61Q = AMPP_FUNCTION(clock, F1_accum[3], VCC, G1_tdl_wait[5]);


--J1L51Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[14]~reg0
--operation mode is normal

J1L51Q = AMPP_FUNCTION(clock, F1_accum[2], VCC, G1_tdl_wait[5]);


--J1L41Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[13]~reg0
--operation mode is normal

J1L41Q = AMPP_FUNCTION(clock, F1_accum[1], VCC, G1_tdl_wait[5]);


--J1L31Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[12]~reg0
--operation mode is normal

J1L31Q = AMPP_FUNCTION(clock, F1_accum[0], VCC, G1_tdl_wait[5]);


--J1L21Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[11]~reg0
--operation mode is normal

J1L21Q = AMPP_FUNCTION(clock, H1L21Q, VCC, G1_tdl_wait[5]);


--J1L11Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[10]~reg0
--operation mode is normal

J1L11Q = AMPP_FUNCTION(clock, H1L11Q, VCC, G1_tdl_wait[5]);


--J1L01Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[9]~reg0
--operation mode is normal

J1L01Q = AMPP_FUNCTION(clock, H1L01Q, VCC, G1_tdl_wait[5]);


--J1L9Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[8]~reg0
--operation mode is normal

J1L9Q = AMPP_FUNCTION(clock, H1L9Q, VCC, G1_tdl_wait[5]);


--J1L8Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[7]~reg0
--operation mode is normal

J1L8Q = AMPP_FUNCTION(clock, H1L8Q, VCC, G1_tdl_wait[5]);


--J1L7Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[6]~reg0
--operation mode is normal

J1L7Q = AMPP_FUNCTION(clock, H1L7Q, VCC, G1_tdl_wait[5]);


--J1L6Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[5]~reg0
--operation mode is normal

J1L6Q = AMPP_FUNCTION(clock, H1L6Q, VCC, G1_tdl_wait[5]);


--J1L5Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[4]~reg0
--operation mode is normal

J1L5Q = AMPP_FUNCTION(clock, H1L5Q, VCC, G1_tdl_wait[5]);


--J1L4Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[3]~reg0
--operation mode is normal

J1L4Q = AMPP_FUNCTION(clock, H1L4Q, VCC, G1_tdl_wait[5]);


--J1L3Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[2]~reg0
--operation mode is normal

J1L3Q = AMPP_FUNCTION(clock, H1L3Q, VCC, G1_tdl_wait[5]);


--J1L2Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[1]~reg0
--operation mode is normal

J1L2Q = AMPP_FUNCTION(clock, H1L2Q, VCC, G1_tdl_wait[5]);


--J1L1Q is fir_top_st:fir_top_st_component|scale_shft_comb:Usscx|res[0]~reg0
--operation mode is normal

J1L1Q = AMPP_FUNCTION(clock, H1L1Q, VCC, G1_tdl_wait[5]);


--G1_tdl_wait[12] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[12]
--operation mode is normal

G1_tdl_wait[12] = AMPP_FUNCTION(clock, G1_tdl_rdy, !rst);


--G1_tdl_wait[5] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[5]
--operation mode is normal

G1_tdl_wait[5] = AMPP_FUNCTION(clock, G1_tdl_wait[6], !rst);


--H1L21Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[11]~reg0
--operation mode is normal

H1L21Q = AMPP_FUNCTION(clock, F1_accum[0], VCC);


--H1L11Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[10]~reg0
--operation mode is normal

H1L11Q = AMPP_FUNCTION(clock, H1L21Q, VCC);


--H1L01Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[9]~reg0
--operation mode is normal

H1L01Q = AMPP_FUNCTION(clock, H1L11Q, VCC);


--H1L9Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[8]~reg0
--operation mode is normal

H1L9Q = AMPP_FUNCTION(clock, H1L01Q, VCC);


--H1L8Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[7]~reg0
--operation mode is normal

H1L8Q = AMPP_FUNCTION(clock, H1L9Q, VCC);


--H1L7Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[6]~reg0
--operation mode is normal

H1L7Q = AMPP_FUNCTION(clock, H1L8Q, VCC);


--H1L6Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[5]~reg0
--operation mode is normal

H1L6Q = AMPP_FUNCTION(clock, H1L7Q, VCC);


--H1L5Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[4]~reg0
--operation mode is normal

H1L5Q = AMPP_FUNCTION(clock, H1L6Q, VCC);


--H1L4Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[3]~reg0
--operation mode is normal

H1L4Q = AMPP_FUNCTION(clock, H1L5Q, VCC);


--H1L3Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[2]~reg0
--operation mode is normal

H1L3Q = AMPP_FUNCTION(clock, H1L4Q, VCC);


--H1L2Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[1]~reg0
--operation mode is normal

H1L2Q = AMPP_FUNCTION(clock, H1L3Q, VCC);


--H1L1Q is fir_top_st:fir_top_st_component|ser_shft:Usershft|shft_out[0]~reg0
--operation mode is normal

H1L1Q = AMPP_FUNCTION(clock, H1L2Q, VCC);


--G1_tdl_rdy is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_rdy
--operation mode is normal

G1_tdl_rdy = AMPP_FUNCTION(clock, G1_tdl_wait[0], G1L1, G1L2, G1L3, !rst);


--G1_tdl_wait[6] is fir_top_st:fir_top_st_component|ser_ctrl_nc:Usc|tdl_wait[6]
--operation mode is normal

G1_tdl_wait[6] = AMPP_FUNCTION(clock, G1_tdl_wait[7], !rst);


--F1_a_reg[14] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[14]
--operation mode is normal

F1_a_reg[14] = AMPP_FUNCTION(clock, C3L92Q, VCC);


--F1_rst_dly is fir_top_st:fir_top_st_component|scale_accum:Usa|rst_dly
--operation mode is normal

F1_rst_dly = AMPP_FUNCTION(clock, G1_tdl_wait[6], VCC);


--F1_a_reg[13] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[13]
--operation mode is normal

F1_a_reg[13] = AMPP_FUNCTION(clock, C3L72Q, VCC);


--F1_a_reg[12] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[12]
--operation mode is normal

F1_a_reg[12] = AMPP_FUNCTION(clock, C3L52Q, VCC);


--F1_a_reg[11] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[11]
--operation mode is normal

F1_a_reg[11] = AMPP_FUNCTION(clock, C3L32Q, VCC);


--F1_a_reg[10] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[10]
--operation mode is normal

F1_a_reg[10] = AMPP_FUNCTION(clock, C3L12Q, VCC);


--F1_a_reg[9] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[9]
--operation mode is normal

F1_a_reg[9] = AMPP_FUNCTION(clock, C3L91Q, VCC);


--F1_a_reg[8] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[8]
--operation mode is normal

F1_a_reg[8] = AMPP_FUNCTION(clock, C3L71Q, VCC);


--F1_a_reg[7] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[7]
--operation mode is normal

F1_a_reg[7] = AMPP_FUNCTION(clock, C3L51Q, VCC);


--F1_a_reg[6] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[6]
--operation mode is normal

F1_a_reg[6] = AMPP_FUNCTION(clock, C3L31Q, VCC);


--F1_a_reg[5] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[5]
--operation mode is normal

F1_a_reg[5] = AMPP_FUNCTION(clock, C3L11Q, VCC);


--F1_a_reg[4] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[4]
--operation mode is normal

F1_a_reg[4] = AMPP_FUNCTION(clock, C3L9Q, VCC);


--F1_a_reg[3] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[3]
--operation mode is normal

F1_a_reg[3] = AMPP_FUNCTION(clock, C3L7Q, VCC);


--F1_a_reg[2] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[2]
--operation mode is normal

F1_a_reg[2] = AMPP_FUNCTION(clock, C3L5Q, VCC);


--F1_a_reg[1] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_reg[1]