fir_top.map.eqn

Altera FPGA CPLD设计高级篇电子书籍

--operation mode is arithmetic

C3L21 = AMPP_FUNCTION(C2L6Q, C1L11Q, C3L01);


--C3L31Q is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[6]~reg0
--operation mode is arithmetic

C3L31Q = AMPP_FUNCTION(clock, C2L7Q, C1L31Q, VCC, C3L21);

--C3L41 is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[6]~reg0COUT
--operation mode is arithmetic

C3L41 = AMPP_FUNCTION(C2L7Q, C1L31Q, C3L21);


--C3L51Q is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[7]~reg0
--operation mode is arithmetic

C3L51Q = AMPP_FUNCTION(clock, C2L8Q, C1L51Q, VCC, C3L41);

--C3L61 is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[7]~reg0COUT
--operation mode is arithmetic

C3L61 = AMPP_FUNCTION(C2L8Q, C1L51Q, C3L41);


--C3L71Q is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[8]~reg0
--operation mode is arithmetic

C3L71Q = AMPP_FUNCTION(clock, C2L9Q, C1L71Q, VCC, C3L61);

--C3L81 is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[8]~reg0COUT
--operation mode is arithmetic

C3L81 = AMPP_FUNCTION(C2L9Q, C1L71Q, C3L61);


--C3L91Q is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[9]~reg0
--operation mode is arithmetic

C3L91Q = AMPP_FUNCTION(clock, C2L01Q, C1L91Q, VCC, C3L81);

--C3L02 is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[9]~reg0COUT
--operation mode is arithmetic

C3L02 = AMPP_FUNCTION(C2L01Q, C1L91Q, C3L81);


--C3L12Q is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[10]~reg0
--operation mode is arithmetic

C3L12Q = AMPP_FUNCTION(clock, C2L11Q, C1L12Q, VCC, C3L02);

--C3L22 is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[10]~reg0COUT
--operation mode is arithmetic

C3L22 = AMPP_FUNCTION(C2L11Q, C1L12Q, C3L02);


--C3L32Q is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[11]~reg0
--operation mode is arithmetic

C3L32Q = AMPP_FUNCTION(clock, C2L21Q, C1L32Q, VCC, C3L22);

--C3L42 is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[11]~reg0COUT
--operation mode is arithmetic

C3L42 = AMPP_FUNCTION(C2L21Q, C1L32Q, C3L22);


--C3L52Q is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[12]~reg0
--operation mode is arithmetic

C3L52Q = AMPP_FUNCTION(clock, C2L21Q, C1L52Q, VCC, C3L42);

--C3L62 is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[12]~reg0COUT
--operation mode is arithmetic

C3L62 = AMPP_FUNCTION(C2L21Q, C1L52Q, C3L42);


--C3L72Q is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[13]~reg0
--operation mode is arithmetic

C3L72Q = AMPP_FUNCTION(clock, C2L21Q, C1L72Q, VCC, C3L62);

--C3L82 is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[13]~reg0COUT
--operation mode is arithmetic

C3L82 = AMPP_FUNCTION(C2L21Q, C1L72Q, C3L62);


--C3L92Q is fir_top_st:fir_top_st_component|sadd:Uaddl_1_n_0_n|res[14]~reg0
--operation mode is normal

C3L92Q = AMPP_FUNCTION(clock, C2L21Q, C1L72Q, VCC, C3L82);


--C1L1Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[0]~reg0
--operation mode is arithmetic

C1L1Q = AMPP_FUNCTION(clock, R1_q_b[0], Q1_q_b[0], VCC);

--C1L2 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[0]~reg0COUT
--operation mode is arithmetic

C1L2 = AMPP_FUNCTION(R1_q_b[0], Q1_q_b[0]);


--C1L3Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[1]~reg0
--operation mode is arithmetic

C1L3Q = AMPP_FUNCTION(clock, R1_q_b[1], Q1_q_b[1], VCC, C1L2);

--C1L4 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[1]~reg0COUT
--operation mode is arithmetic

C1L4 = AMPP_FUNCTION(R1_q_b[1], Q1_q_b[1], C1L2);


--C1L5Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[2]~reg0
--operation mode is arithmetic

C1L5Q = AMPP_FUNCTION(clock, R1_q_b[2], Q1_q_b[2], VCC, C1L4);

--C1L6 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[2]~reg0COUT
--operation mode is arithmetic

C1L6 = AMPP_FUNCTION(R1_q_b[2], Q1_q_b[2], C1L4);


--C1L7Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[3]~reg0
--operation mode is arithmetic

C1L7Q = AMPP_FUNCTION(clock, R1_q_b[3], Q1_q_b[3], VCC, C1L6);

--C1L8 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[3]~reg0COUT
--operation mode is arithmetic

C1L8 = AMPP_FUNCTION(R1_q_b[3], Q1_q_b[3], C1L6);


--C1L9Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[4]~reg0
--operation mode is arithmetic

C1L9Q = AMPP_FUNCTION(clock, R1_q_b[4], Q1_q_b[4], VCC, C1L8);

--C1L01 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[4]~reg0COUT
--operation mode is arithmetic

C1L01 = AMPP_FUNCTION(R1_q_b[4], Q1_q_b[4], C1L8);


--C1L11Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[5]~reg0
--operation mode is arithmetic

C1L11Q = AMPP_FUNCTION(clock, R1_q_b[5], Q1_q_b[5], VCC, C1L01);

--C1L21 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[5]~reg0COUT
--operation mode is arithmetic

C1L21 = AMPP_FUNCTION(R1_q_b[5], Q1_q_b[5], C1L01);


--C1L31Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[6]~reg0
--operation mode is arithmetic

C1L31Q = AMPP_FUNCTION(clock, R1_q_b[6], Q1_q_b[6], VCC, C1L21);

--C1L41 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[6]~reg0COUT
--operation mode is arithmetic

C1L41 = AMPP_FUNCTION(R1_q_b[6], Q1_q_b[6], C1L21);


--C1L51Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[7]~reg0
--operation mode is arithmetic

C1L51Q = AMPP_FUNCTION(clock, R1_q_b[7], Q1_q_b[7], VCC, C1L41);

--C1L61 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[7]~reg0COUT
--operation mode is arithmetic

C1L61 = AMPP_FUNCTION(R1_q_b[7], Q1_q_b[7], C1L41);


--C1L71Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[8]~reg0
--operation mode is arithmetic

C1L71Q = AMPP_FUNCTION(clock, R1_q_b[8], Q1_q_b[8], VCC, C1L61);

--C1L81 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[8]~reg0COUT
--operation mode is arithmetic

C1L81 = AMPP_FUNCTION(R1_q_b[8], Q1_q_b[8], C1L61);


--C1L91Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[9]~reg0
--operation mode is arithmetic

C1L91Q = AMPP_FUNCTION(clock, R1_q_b[9], Q1_q_b[9], VCC, C1L81);

--C1L02 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[9]~reg0COUT
--operation mode is arithmetic

C1L02 = AMPP_FUNCTION(R1_q_b[9], Q1_q_b[9], C1L81);


--C1L12Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[10]~reg0
--operation mode is arithmetic

C1L12Q = AMPP_FUNCTION(clock, R1_q_b[10], Q1_q_b[10], VCC, C1L02);

--C1L22 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[10]~reg0COUT
--operation mode is arithmetic

C1L22 = AMPP_FUNCTION(R1_q_b[10], Q1_q_b[10], C1L02);


--C1L32Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[11]~reg0
--operation mode is arithmetic

C1L32Q = AMPP_FUNCTION(clock, R1_q_b[11], Q1_q_b[11], VCC, C1L22);

--C1L42 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[11]~reg0COUT
--operation mode is arithmetic

C1L42 = AMPP_FUNCTION(R1_q_b[11], Q1_q_b[11], C1L22);


--C1L52Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[12]~reg0
--operation mode is arithmetic

C1L52Q = AMPP_FUNCTION(clock, R1_q_b[12], Q1_q_b[12], VCC, C1L42);

--C1L62 is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[12]~reg0COUT
--operation mode is arithmetic

C1L62 = AMPP_FUNCTION(R1_q_b[12], Q1_q_b[12], C1L42);


--C1L72Q is fir_top_st:fir_top_st_component|sadd:Uaddl_0_n_0_n|res[13]~reg0
--operation mode is normal

C1L72Q = AMPP_FUNCTION(clock, R1_q_b[12], Q1_q_b[12], VCC, C1L62);


--F1L3 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[0]~0
--operation mode is arithmetic

F1L3 = AMPP_FUNCTION(G1_tdl_wait[7]);


--F1_a_inv_mx[0] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[0]
--operation mode is arithmetic

F1_a_inv_mx[0] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L1Q, VCC, F1L3);

--F1L4 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[0]~COUT
--operation mode is arithmetic

F1L4 = AMPP_FUNCTION(G1_tdl_wait[7], C3L1Q, F1L3);


--F1_a_inv_mx[1] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[1]
--operation mode is arithmetic

F1_a_inv_mx[1] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L3Q, VCC, F1L4);

--F1L6 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[1]~COUT
--operation mode is arithmetic

F1L6 = AMPP_FUNCTION(G1_tdl_wait[7], C3L3Q, F1L4);


--F1_a_inv_mx[2] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[2]
--operation mode is arithmetic

F1_a_inv_mx[2] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L5Q, VCC, F1L6);

--F1L8 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[2]~COUT
--operation mode is arithmetic

F1L8 = AMPP_FUNCTION(G1_tdl_wait[7], C3L5Q, F1L6);


--F1_a_inv_mx[3] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[3]
--operation mode is arithmetic

F1_a_inv_mx[3] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L7Q, VCC, F1L8);

--F1L01 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[3]~COUT
--operation mode is arithmetic

F1L01 = AMPP_FUNCTION(G1_tdl_wait[7], C3L7Q, F1L8);


--F1_a_inv_mx[4] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[4]
--operation mode is arithmetic

F1_a_inv_mx[4] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L9Q, VCC, F1L01);

--F1L21 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[4]~COUT
--operation mode is arithmetic

F1L21 = AMPP_FUNCTION(G1_tdl_wait[7], C3L9Q, F1L01);


--F1_a_inv_mx[5] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[5]
--operation mode is arithmetic

F1_a_inv_mx[5] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L11Q, VCC, F1L21);

--F1L41 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[5]~COUT
--operation mode is arithmetic

F1L41 = AMPP_FUNCTION(G1_tdl_wait[7], C3L11Q, F1L21);


--F1_a_inv_mx[6] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[6]
--operation mode is arithmetic

F1_a_inv_mx[6] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L31Q, VCC, F1L41);

--F1L61 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[6]~COUT
--operation mode is arithmetic

F1L61 = AMPP_FUNCTION(G1_tdl_wait[7], C3L31Q, F1L41);


--F1_a_inv_mx[7] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[7]
--operation mode is arithmetic

F1_a_inv_mx[7] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L51Q, VCC, F1L61);

--F1L81 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[7]~COUT
--operation mode is arithmetic

F1L81 = AMPP_FUNCTION(G1_tdl_wait[7], C3L51Q, F1L61);


--F1_a_inv_mx[8] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[8]
--operation mode is arithmetic

F1_a_inv_mx[8] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L71Q, VCC, F1L81);

--F1L02 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[8]~COUT
--operation mode is arithmetic

F1L02 = AMPP_FUNCTION(G1_tdl_wait[7], C3L71Q, F1L81);


--F1_a_inv_mx[9] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[9]
--operation mode is arithmetic

F1_a_inv_mx[9] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L91Q, VCC, F1L02);

--F1L22 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[9]~COUT
--operation mode is arithmetic

F1L22 = AMPP_FUNCTION(G1_tdl_wait[7], C3L91Q, F1L02);


--F1_a_inv_mx[10] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[10]
--operation mode is arithmetic

F1_a_inv_mx[10] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L12Q, VCC, F1L22);

--F1L42 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[10]~COUT
--operation mode is arithmetic

F1L42 = AMPP_FUNCTION(G1_tdl_wait[7], C3L12Q, F1L22);


--F1_a_inv_mx[11] is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[11]
--operation mode is arithmetic

F1_a_inv_mx[11] = AMPP_FUNCTION(clock, G1_tdl_wait[7], C3L32Q, VCC, F1L42);

--F1L62 is fir_top_st:fir_top_st_component|scale_accum:Usa|a_inv_mx[11]~COUT
--operation mode is arithmetic

F1L62 = AMPP_FUNCTION(G1_tdl_wait[7], C3L32Q, F1L42);