data_buffer.tan.summary

Altera FPGA CPLD设计高级篇电子书籍

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 5.987 ns
From           : rdreq
To             : scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a15~portb_address_reg11

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 13.677 ns
From           : scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a9~portb_address_reg11
To             : q[1]

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -2.689 ns
From           : data[3]
To             : scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a3~porta_datain_reg0

Type           : Worst-case minimum tco
Slack          : N/A
Required Time  : None
Actual Time    : 8.111 ns
From           : scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|a_fefifo_n4f:fifo_state|b_non_empty
To             : empty

Type           : Clock Setup: 'clock'
Slack          : N/A
Required Time  : None
Actual Time    : 250.75 MHz ( period = 3.988 ns )
From           : scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|a_fefifo_n4f:fifo_state|b_full
To             : scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a3~porta_we_reg

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