data_buffer.tan.rpt

Altera FPGA CPLD设计高级篇电子书籍

+--------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                               ;
+---------------------------------------------------------------------------------------------------------------------------------------
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; clock           ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clock'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
; Slack                                   ; Actual fmax (period)                                       ; From                                                                                                                                                             ; To                                                                                                                                                                ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 250.75 MHz ( period = 3.988 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|a_fefifo_n4f:fifo_state|b_full                                                             ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a3~porta_we_reg                     ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a15~porta_datain_reg0              ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a15~porta_memory_reg0               ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a14~porta_datain_reg0              ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a14~porta_memory_reg0               ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a13~porta_datain_reg0              ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a13~porta_memory_reg0               ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a12~porta_datain_reg0              ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a12~porta_memory_reg0               ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a11~porta_datain_reg0              ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a11~porta_memory_reg0               ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a10~porta_datain_reg0              ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a10~porta_memory_reg0               ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a9~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a9~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a8~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a8~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a7~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a7~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a6~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a6~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a5~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a5~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a4~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a4~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a3~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a3~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a2~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a2~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a1~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a1~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 255.56 MHz ( period = 3.913 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a0~porta_datain_reg0               ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a0~porta_memory_reg0                ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 259.00 MHz ( period = 3.861 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|a_fefifo_n4f:fifo_state|b_full                                                             ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a2~porta_we_reg                     ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 260.01 MHz ( period = 3.846 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|a_fefifo_n4f:fifo_state|b_full                                                             ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a1~porta_we_reg                     ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 265.89 MHz ( period = 3.761 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|a_fefifo_n4f:fifo_state|b_full                                                             ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a9~porta_we_reg                     ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 266.95 MHz ( period = 3.746 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|a_fefifo_n4f:fifo_state|b_full                                                             ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a14~porta_we_reg                    ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 267.17 MHz ( period = 3.743 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|a_fefifo_n4f:fifo_state|b_full                                                             ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a11~porta_we_reg                    ; clock      ; clock    ; None                        ; None                      ; None                    ;
; N/A                                     ; 268.24 MHz ( period = 3.728 ns )                           ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|a_fefifo_n4f:fifo_state|b_full                                                             ; scfifo:scfifo_component|scfifo_39m:auto_generated|a_dpfifo_ihi:dpfifo|dpram_btj:FIFOram|altsyncram_9kb1:altsyncram1|ram_block2a5~porta_we_reg                     ; clock      ; clock    ; None                        ; None                      ; None                    ;