⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 i2c.map.eqn

📁 CPLD VHDL CODE非常好的参考资料
💻 EQN
📖 第 1 页 / 共 5 页
字号:
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--writeData_reg[3] is writeData_reg[3]
writeData_reg[3]_or_out = data_in[3];
writeData_reg[3]_reg_input = writeData_reg[3]_or_out;
writeData_reg[3]_p3_out = !main_state[1] & !main_state[0];
writeData_reg[3] = DFFE(writeData_reg[3]_reg_input, GLOBAL(clk), GLOBAL(rst), , writeData_reg[3]_p3_out);


--writeData_reg[1] is writeData_reg[1]
writeData_reg[1]_or_out = data_in[1];
writeData_reg[1]_reg_input = writeData_reg[1]_or_out;
writeData_reg[1]_p3_out = !main_state[1] & !main_state[0];
writeData_reg[1] = DFFE(writeData_reg[1]_reg_input, GLOBAL(clk), GLOBAL(rst), , writeData_reg[1]_p3_out);


--writeData_reg[2] is writeData_reg[2]
writeData_reg[2]_or_out = !data_in[2];
writeData_reg[2]_reg_input = writeData_reg[2]_or_out;
writeData_reg[2]_p3_out = !main_state[1] & !main_state[0];
writeData_reg[2] = DFFE(writeData_reg[2]_reg_input, GLOBAL(clk), GLOBAL(rst), , writeData_reg[2]_p3_out);


--writeData_reg[0] is writeData_reg[0]
writeData_reg[0]_or_out = !data_in[0];
writeData_reg[0]_reg_input = writeData_reg[0]_or_out;
writeData_reg[0]_p3_out = !main_state[1] & !main_state[0];
writeData_reg[0] = DFFE(writeData_reg[0]_reg_input, GLOBAL(clk), GLOBAL(rst), , writeData_reg[0]_p3_out);


--C1_dffs[0] is lpm_counter:cnt_scan_rtl_0|dffs[0]
C1_dffs[0]_reg_input = VCC;
C1_dffs[0] = TFFE(C1_dffs[0]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[1] is lpm_counter:cnt_scan_rtl_0|dffs[1]
C1_dffs[1]_or_out = C1_dffs[0];
C1_dffs[1]_reg_input = C1_dffs[1]_or_out;
C1_dffs[1] = TFFE(C1_dffs[1]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--cnt_delay[19] is cnt_delay[19]
cnt_delay[19]_p1_out = cnt_delay[18] & cnt_delay[17] & cnt_delay[16] & cnt_delay[15] & cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & cnt_delay[11] & cnt_delay[8] & cnt_delay[9] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L511;
cnt_delay[19]_p2_out = cnt_delay[18] & !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & !cnt_delay[11] & cnt_delay[8] & !cnt_delay[9] & !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[19];
cnt_delay[19]_or_out = cnt_delay[19]_p1_out # cnt_delay[19]_p2_out;
cnt_delay[19]_reg_input = cnt_delay[19]_or_out;
cnt_delay[19] = TFFE(cnt_delay[19]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--clk_div[1] is clk_div[1]
clk_div[1]_or_out = clk_div[1];
clk_div[1]_reg_input = C1_dffs[0] $ clk_div[1]_or_out;
clk_div[1] = DFFE(clk_div[1]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--i2c_state[1] is i2c_state[1]
i2c_state[1]_p1_out = !i2c_state[0] & inner_state[3] & !inner_state[1] & !inner_state[2] & inner_state[0] & phase3 & i2c_state[2] & !main_state[0] & main_state[1] & !i2c_state[1];
i2c_state[1]_p2_out = i2c_state[0] & inner_state[3] & !inner_state[1] & !inner_state[2] & inner_state[0] & phase3 & !i2c_state[2] & main_state[0] & !main_state[1] & !i2c_state[1];
i2c_state[1]_p3_out = !main_state[0] & !main_state[1] & i2c_state[1];
i2c_state[1]_or_out = i2c_state[1]_p1_out # i2c_state[1]_p2_out # i2c_state[1]_p3_out;
i2c_state[1]_reg_input = i2c_state[1]_or_out;
i2c_state[1] = TFFE(i2c_state[1]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[2] is lpm_counter:cnt_scan_rtl_0|dffs[2]
C1_dffs[2]_p1_out = C1_dffs[1] & C1_dffs[0];
C1_dffs[2]_or_out = C1_dffs[2]_p1_out;
C1_dffs[2]_reg_input = C1_dffs[2]_or_out;
C1_dffs[2] = TFFE(C1_dffs[2]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[3] is lpm_counter:cnt_scan_rtl_0|dffs[3]
C1_dffs[3]_p1_out = C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1_dffs[3]_or_out = C1_dffs[3]_p1_out;
C1_dffs[3]_reg_input = C1_dffs[3]_or_out;
C1_dffs[3] = TFFE(C1_dffs[3]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--clk_div[2] is clk_div[2]
clk_div[2]_p1_out = clk_div[5] & !clk_div[3] & !clk_div[7] & clk_div[6] & !clk_div[4] & C1_dffs[0] & clk_div[1];
clk_div[2]_p2_out = !C1_dffs[0] & !clk_div[2];
clk_div[2]_p3_out = !clk_div[1] & !clk_div[2];
clk_div[2]_p4_out = C1_dffs[0] & clk_div[1] & clk_div[2];
clk_div[2]_or_out = clk_div[2]_p1_out # clk_div[2]_p2_out # clk_div[2]_p3_out # clk_div[2]_p4_out;
clk_div[2]_reg_input = !(clk_div[2]_or_out);
clk_div[2] = DFFE(clk_div[2]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--inner_state[2] is inner_state[2]
inner_state[2]_p0_out = !main_state[1] & !main_state[0] & inner_state[2];
inner_state[2]_p1_out = !i2c_state[1] & inner_state[1] & !inner_state[3] & inner_state[0] & phase3 & !i2c_state[2] & !main_state[1] & main_state[0];
inner_state[2]_p2_out = inner_state[1] & !inner_state[3] & inner_state[0] & phase3 & !i2c_state[2] & !main_state[1] & main_state[0] & !i2c_state[0];
inner_state[2]_p3_out = inner_state[1] & !inner_state[3] & inner_state[0] & phase3 & !i2c_state[2] & main_state[1] & !main_state[0] & i2c_state[0];
inner_state[2]_p4_out = !i2c_state[1] & inner_state[1] & !inner_state[3] & inner_state[0] & phase3 & main_state[1] & !main_state[0] & !i2c_state[0];
inner_state[2]_or_out = A1L141 # inner_state[2]_p0_out # inner_state[2]_p1_out # inner_state[2]_p2_out # inner_state[2]_p3_out # inner_state[2]_p4_out;
inner_state[2]_reg_input = inner_state[2]_or_out;
inner_state[2] = TFFE(inner_state[2]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[4] is lpm_counter:cnt_scan_rtl_0|dffs[4]
C1_dffs[4]_p1_out = C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1_dffs[4]_or_out = C1_dffs[4]_p1_out;
C1_dffs[4]_reg_input = C1_dffs[4]_or_out;
C1_dffs[4] = TFFE(C1_dffs[4]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[5] is lpm_counter:cnt_scan_rtl_0|dffs[5]
C1_dffs[5]_p1_out = C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1_dffs[5]_or_out = C1_dffs[5]_p1_out;
C1_dffs[5]_reg_input = C1_dffs[5]_or_out;
C1_dffs[5] = TFFE(C1_dffs[5]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--clk_div[3] is clk_div[3]
clk_div[3]_p1_out = clk_div[2] & C1_dffs[0] & clk_div[1];
clk_div[3]_or_out = clk_div[3];
clk_div[3]_reg_input = clk_div[3]_p1_out $ clk_div[3]_or_out;
clk_div[3] = DFFE(clk_div[3]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[6] is lpm_counter:cnt_scan_rtl_0|dffs[6]
C1_dffs[6]_p1_out = C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1_dffs[6]_or_out = C1_dffs[6]_p1_out;
C1_dffs[6]_reg_input = C1_dffs[6]_or_out;
C1_dffs[6] = TFFE(C1_dffs[6]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[7] is lpm_counter:cnt_scan_rtl_0|dffs[7]
C1_dffs[7]_p1_out = C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1_dffs[7]_or_out = C1_dffs[7]_p1_out;
C1_dffs[7]_reg_input = C1_dffs[7]_or_out;
C1_dffs[7] = TFFE(C1_dffs[7]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--clk_div[4] is clk_div[4]
clk_div[4]_p1_out = clk_div[3] & clk_div[2] & C1_dffs[0] & clk_div[1];
clk_div[4]_or_out = clk_div[4];
clk_div[4]_reg_input = clk_div[4]_p1_out $ clk_div[4]_or_out;
clk_div[4] = DFFE(clk_div[4]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[8] is lpm_counter:cnt_scan_rtl_0|dffs[8]
C1_dffs[8]_p1_out = C1_dffs[7] & C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1_dffs[8]_or_out = C1_dffs[8]_p1_out;
C1_dffs[8]_reg_input = C1_dffs[8]_or_out;
C1_dffs[8] = TFFE(C1_dffs[8]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--clk_div[5] is clk_div[5]
clk_div[5]_p1_out = !clk_div[7] & clk_div[6] & C1_dffs[0] & !clk_div[4] & !clk_div[3] & !clk_div[2] & clk_div[5] & clk_div[1];
clk_div[5]_p2_out = C1_dffs[0] & clk_div[4] & clk_div[3] & clk_div[2] & clk_div[1];
clk_div[5]_or_out = clk_div[5]_p1_out # clk_div[5]_p2_out;
clk_div[5]_reg_input = clk_div[5]_or_out;
clk_div[5] = TFFE(clk_div[5]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[9] is lpm_counter:cnt_scan_rtl_0|dffs[9]
C1_dffs[9]_p1_out = C1_dffs[8] & C1_dffs[7] & C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1_dffs[9]_or_out = C1_dffs[9]_p1_out;
C1_dffs[9]_reg_input = C1_dffs[9]_or_out;
C1_dffs[9] = TFFE(C1_dffs[9]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[10] is lpm_counter:cnt_scan_rtl_0|dffs[10]
C1_dffs[10]_p1_out = C1_dffs[9] & C1_dffs[8] & C1_dffs[7] & C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1_dffs[10]_or_out = C1_dffs[10]_p1_out;
C1_dffs[10]_reg_input = C1_dffs[10]_or_out;
C1_dffs[10] = TFFE(C1_dffs[10]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--clk_div[7] is clk_div[7]
clk_div[7]_p1_out = clk_div[6] & clk_div[5] & clk_div[4] & clk_div[3] & clk_div[2] & C1_dffs[0] & clk_div[1];
clk_div[7]_or_out = clk_div[7];
clk_div[7]_reg_input = clk_div[7]_p1_out $ clk_div[7]_or_out;
clk_div[7] = DFFE(clk_div[7]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--C1_dffs[11] is lpm_counter:cnt_scan_rtl_0|dffs[11]
C1_dffs[11]_p1_out = C1_dffs[10] & C1_dffs[9] & C1_dffs[8] & C1_dffs[7] & C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
C1_dffs[11]_or_out = C1_dffs[11]_p1_out;
C1_dffs[11]_reg_input = C1_dffs[11]_or_out;
C1_dffs[11] = TFFE(C1_dffs[11]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--en_xhdl3[0] is en_xhdl3[0]
en_xhdl3[0]_p1_out = C1_dffs[11] & C1_dffs[10] & C1_dffs[9] & C1_dffs[8] & C1_dffs[7] & C1_dffs[6] & C1_dffs[5] & C1_dffs[4] & C1_dffs[3] & C1_dffs[2] & C1_dffs[1] & C1_dffs[0];
en_xhdl3[0]_or_out = en_xhdl3[0]_p1_out;
en_xhdl3[0]_reg_input = en_xhdl3[0]_or_out;
en_xhdl3[0] = TFFE(en_xhdl3[0]_reg_input, GLOBAL(clk), GLOBAL(rst), , );


⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -