i2c.fit.eqn

CPLD VHDL CODE非常好的参考资料

A1L521 = EXP(en_xhdl3[0] & en_xhdl3[1]);


--A1L621 is reduce_or~2468 at SEXP82
A1L621 = EXP(!writeData_reg[2] & !writeData_reg[3] & !writeData_reg[1] & !en_xhdl3[0]);


--A1L721 is reduce_or~2473 at LC86
A1L721_p1_out = A1L321 & A1L421 & A1L521 & A1L621;
A1L721_p0_out = A1L321 & A1L421 & A1L521 & A1L621 & !en_xhdl3[0] & A1L221 & writeData_reg[0];
A1L721_p2_out = A1L321 & A1L421 & A1L521 & A1L621 & A1L911 & !readData_reg[4] & !readData_reg[5] & !readData_reg[6] & !readData_reg[7] & !readData_reg[0] & en_xhdl3[0];
A1L721_p3_out = A1L321 & A1L421 & A1L521 & A1L621 & !readData_reg[4] & !readData_reg[5] & !readData_reg[6] & !readData_reg[7] & en_xhdl3[0] & A1L021 & readData_reg[3];
A1L721_p4_out = A1L321 & A1L421 & A1L521 & A1L621 & !en_xhdl3[0] & A1L121 & writeData_reg[3];
A1L721_or_out = A1L721_p0_out # A1L721_p2_out # A1L721_p3_out # A1L721_p4_out;
A1L721 = A1L721_p1_out $ A1L721_or_out;


--A1L821 is reduce_or~2476 at SEXP100
A1L821 = EXP(!readData_reg[4] & !readData_reg[5] & !readData_reg[6] & !readData_reg[7]);


--A1L921 is reduce_or~2477 at SEXP99
A1L921 = EXP(readData_reg[0] & !readData_reg[1]);


--A1L031 is reduce_or~2478 at SEXP98
A1L031 = EXP(!writeData_reg[0] & !writeData_reg[1]);


--A1L131 is reduce_or~2484 at LC97
A1L131_p0_out = !en_xhdl3[0] & en_xhdl3[1] & writeData_reg[3] & !writeData_reg[2] & A1L031;
A1L131_p1_out = !readData_reg[3] & readData_reg[1] & !readData_reg[0] & !readData_reg[2] & en_xhdl3[0] & !en_xhdl3[1];
A1L131_p2_out = !en_xhdl3[0] & en_xhdl3[1] & !writeData_reg[3] & writeData_reg[1] & writeData_reg[0] & writeData_reg[2];
A1L131_p3_out = en_xhdl3[0] & !en_xhdl3[1] & A1L821;
A1L131_p4_out = readData_reg[3] & readData_reg[2] & en_xhdl3[0] & !en_xhdl3[1] & A1L921;
A1L131_or_out = A1L131_p0_out # A1L131_p1_out # A1L131_p2_out # A1L131_p3_out # A1L131_p4_out;
A1L131 = A1L131_or_out;


--A1L231 is reduce_or~2485 at LC85
A1L231_p1_out = en_xhdl3[0] & !en_xhdl3[1];
A1L231_p0_out = !readData_reg[4] & !readData_reg[5] & !readData_reg[6] & !readData_reg[7] & !readData_reg[0] & en_xhdl3[0] & !en_xhdl3[1] & !readData_reg[2];
A1L231_p2_out = !readData_reg[1] & readData_reg[3] & !readData_reg[4] & !readData_reg[5] & !readData_reg[6] & !readData_reg[7] & readData_reg[0] & en_xhdl3[0] & !en_xhdl3[1];
A1L231_p3_out = readData_reg[1] & !readData_reg[3] & !readData_reg[4] & !readData_reg[5] & !readData_reg[6] & !readData_reg[7] & readData_reg[0] & en_xhdl3[0] & !en_xhdl3[1];
A1L231_p4_out = !readData_reg[1] & !readData_reg[3] & !readData_reg[4] & !readData_reg[5] & !readData_reg[6] & !readData_reg[7] & !readData_reg[0] & en_xhdl3[0] & !en_xhdl3[1];
A1L231_or_out = A1L731 # A1L231_p0_out # A1L231_p2_out # A1L231_p3_out # A1L231_p4_out;
A1L231 = A1L231_p1_out $ A1L231_or_out;


--A1L331 is reduce_or~2498 at LC93
A1L331_p0_out = en_xhdl3[0] & !en_xhdl3[1] & A1L341;
A1L331_p1_out = readData_reg[3] & !readData_reg[2] & !readData_reg[0] & readData_reg[1] & en_xhdl3[0] & !en_xhdl3[1];
A1L331_p2_out = !readData_reg[2] & readData_reg[0] & !readData_reg[1] & en_xhdl3[0] & !en_xhdl3[1];
A1L331_p3_out = !en_xhdl3[0] & en_xhdl3[1] & writeData_reg[2] & writeData_reg[3] & writeData_reg[1] & writeData_reg[0];
A1L331_p4_out = !en_xhdl3[0] & en_xhdl3[1] & writeData_reg[2] & !writeData_reg[1] & !writeData_reg[0];
A1L331_or_out = A1L831 # A1L331_p0_out # A1L331_p1_out # A1L331_p2_out # A1L331_p3_out # A1L331_p4_out;
A1L331 = A1L331_or_out;


--A1L431 is reduce_or~2505 at LC88
A1L431_p0_out = en_xhdl3[0] & !en_xhdl3[1] & A1L341;
A1L431_p1_out = readData_reg[0] & readData_reg[3] & !readData_reg[1] & readData_reg[2] & en_xhdl3[0] & !en_xhdl3[1];
A1L431_p2_out = readData_reg[0] & readData_reg[3] & readData_reg[1] & !readData_reg[2] & en_xhdl3[0] & !en_xhdl3[1];
A1L431_p3_out = !en_xhdl3[0] & en_xhdl3[1] & !writeData_reg[0] & writeData_reg[3] & !writeData_reg[1] & !writeData_reg[2];
A1L431_p4_out = !en_xhdl3[0] & en_xhdl3[1] & !writeData_reg[0] & writeData_reg[3] & writeData_reg[1] & writeData_reg[2];
A1L431_or_out = A1L931 # A1L431_p0_out # A1L431_p1_out # A1L431_p2_out # A1L431_p3_out # A1L431_p4_out;
A1L431 = A1L431_or_out;


--A1L531 is reduce_or~2511 at LC91
A1L531_p0_out = !en_xhdl3[0] & en_xhdl3[1] & !writeData_reg[0] & !writeData_reg[3];
A1L531_p1_out = readData_reg[5] & en_xhdl3[0] & !en_xhdl3[1];
A1L531_p2_out = en_xhdl3[0] & !en_xhdl3[1] & readData_reg[6];
A1L531_p3_out = en_xhdl3[0] & !en_xhdl3[1] & readData_reg[7];
A1L531_p4_out = en_xhdl3[0] & !en_xhdl3[1] & readData_reg[0] & !readData_reg[3];
A1L531_or_out = A1L041 # A1L531_p0_out # A1L531_p1_out # A1L531_p2_out # A1L531_p3_out # A1L531_p4_out;
A1L531 = A1L531_or_out;


--cnt_delay[2] is cnt_delay[2] at LC115
cnt_delay[2]_p1_out = cnt_delay[1] & cnt_delay[0];
cnt_delay[2]_or_out = cnt_delay[2];
cnt_delay[2]_reg_input = cnt_delay[2]_p1_out $ cnt_delay[2]_or_out;
cnt_delay[2] = DFFE(cnt_delay[2]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[3] is cnt_delay[3] at LC16
cnt_delay[3]_p1_out = cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[3]_or_out = cnt_delay[3];
cnt_delay[3]_reg_input = cnt_delay[3]_p1_out $ cnt_delay[3]_or_out;
cnt_delay[3] = DFFE(cnt_delay[3]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[4] is cnt_delay[4] at LC71
cnt_delay[4]_p1_out = cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[4]_or_out = cnt_delay[4];
cnt_delay[4]_reg_input = cnt_delay[4]_p1_out $ cnt_delay[4]_or_out;
cnt_delay[4] = DFFE(cnt_delay[4]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[5] is cnt_delay[5] at LC45
cnt_delay[5]_p1_out = cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[5]_or_out = cnt_delay[5];
cnt_delay[5]_reg_input = cnt_delay[5]_p1_out $ cnt_delay[5]_or_out;
cnt_delay[5] = DFFE(cnt_delay[5]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[6] is cnt_delay[6] at LC46
cnt_delay[6]_p1_out = cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[6]_or_out = cnt_delay[6];
cnt_delay[6]_reg_input = cnt_delay[6]_p1_out $ cnt_delay[6]_or_out;
cnt_delay[6] = DFFE(cnt_delay[6]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[7] is cnt_delay[7] at LC72
cnt_delay[7]_p1_out = cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[7]_or_out = cnt_delay[7];
cnt_delay[7]_reg_input = cnt_delay[7]_p1_out $ cnt_delay[7]_or_out;
cnt_delay[7] = DFFE(cnt_delay[7]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[8] is cnt_delay[8] at LC1
cnt_delay[8]_p1_out = cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L611;
cnt_delay[8]_p2_out = !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[8] & cnt_delay[18] & cnt_delay[10] & cnt_delay[19] & !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14] & !cnt_delay[11] & !cnt_delay[9] & cnt_delay[13] & cnt_delay[12];
cnt_delay[8]_or_out = cnt_delay[8]_p1_out # cnt_delay[8]_p2_out;
cnt_delay[8]_reg_input = cnt_delay[8]_or_out;
cnt_delay[8] = TFFE(cnt_delay[8]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[9] is cnt_delay[9] at LC47
cnt_delay[9]_p1_out = cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[9]_or_out = cnt_delay[9];
cnt_delay[9]_reg_input = cnt_delay[9]_p1_out $ cnt_delay[9]_or_out;
cnt_delay[9] = DFFE(cnt_delay[9]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[10] is cnt_delay[10] at LC6
cnt_delay[10]_p1_out = cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L611;
cnt_delay[10]_p2_out = !cnt_delay[9] & cnt_delay[8] & !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[10] & cnt_delay[18] & cnt_delay[19] & !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14] & !cnt_delay[11] & cnt_delay[13] & cnt_delay[12];
cnt_delay[10]_or_out = cnt_delay[10]_p1_out # cnt_delay[10]_p2_out;
cnt_delay[10]_reg_input = cnt_delay[10]_or_out;
cnt_delay[10] = TFFE(cnt_delay[10]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[11] is cnt_delay[11] at LC78
cnt_delay[11]_p1_out = cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[11]_or_out = cnt_delay[11];
cnt_delay[11]_reg_input = cnt_delay[11]_p1_out $ cnt_delay[11]_or_out;
cnt_delay[11] = DFFE(cnt_delay[11]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[12] is cnt_delay[12] at LC74
cnt_delay[12]_p1_out = cnt_delay[11] & cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L711;
cnt_delay[12]_p2_out = !cnt_delay[11] & cnt_delay[10] & !cnt_delay[9] & cnt_delay[8] & !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[12] & cnt_delay[18] & cnt_delay[19] & !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14] & cnt_delay[13];
cnt_delay[12]_or_out = cnt_delay[12]_p1_out # cnt_delay[12]_p2_out;
cnt_delay[12]_reg_input = cnt_delay[12]_or_out;
cnt_delay[12] = TFFE(cnt_delay[12]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[13] is cnt_delay[13] at LC80
cnt_delay[13]_p1_out = cnt_delay[12] & cnt_delay[11] & cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L711;
cnt_delay[13]_p2_out = cnt_delay[12] & !cnt_delay[11] & cnt_delay[10] & !cnt_delay[9] & cnt_delay[8] & !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[13] & cnt_delay[18] & cnt_delay[19] & !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14];
cnt_delay[13]_or_out = cnt_delay[13]_p1_out # cnt_delay[13]_p2_out;
cnt_delay[13]_reg_input = cnt_delay[13]_or_out;
cnt_delay[13] = TFFE(cnt_delay[13]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[14] is cnt_delay[14] at LC79
cnt_delay[14]_p1_out = cnt_delay[13] & cnt_delay[12] & cnt_delay[11] & cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[14]_or_out = cnt_delay[14];
cnt_delay[14]_reg_input = cnt_delay[14]_p1_out $ cnt_delay[14]_or_out;
cnt_delay[14] = DFFE(cnt_delay[14]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[15] is cnt_delay[15] at LC2
cnt_delay[15]_p1_out = cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[11] & cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[15]_or_out = cnt_delay[15];
cnt_delay[15]_reg_input = cnt_delay[15]_p1_out $ cnt_delay[15]_or_out;
cnt_delay[15] = DFFE(cnt_delay[15]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[16] is cnt_delay[16] at LC75
cnt_delay[16]_p1_out = cnt_delay[15] & cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & cnt_delay[11] & cnt_delay[8] & cnt_delay[9] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[16]_or_out = cnt_delay[16]_p1_out;
cnt_delay[16]_reg_input = cnt_delay[16]_or_out;
cnt_delay[16] = TFFE(cnt_delay[16]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[17] is cnt_delay[17] at LC76
cnt_delay[17]_p1_out = cnt_delay[16] & cnt_delay[15] & cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & cnt_delay[11] & cnt_delay[8] & cnt_delay[9] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[17]_or_out = cnt_delay[17];
cnt_delay[17]_reg_input = cnt_delay[17]_p1_out $ cnt_delay[17]_or_out;
cnt_delay[17] = DFFE(cnt_delay[17]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[18] is cnt_delay[18] at LC77
cnt_delay[18]_p1_out = cnt_delay[17] & cnt_delay[16] & cnt_delay[15] & cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & cnt_delay[11] & cnt_delay[8] & cnt_delay[9] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L711;
cnt_delay[18]_p2_out = !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & !cnt_delay[11] & cnt_delay[8] & !cnt_delay[9] & !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[18] & cnt_delay[19];
cnt_delay[18]_or_out = cnt_delay[18]_p1_out # cnt_delay[18]_p2_out;
cnt_delay[18]_reg_input = cnt_delay[18]_or_out;