serial.fit.eqn

CPLD VHDL CODE非常好的参考资料

--A1L641 is txd_buf[2]~604 at LC56
A1L641_p0_out = key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[2] & txd_buf[3] & !state_tras[3];
A1L641_p1_out = !key_entry2 & key_entry1;
A1L641_p2_out = key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[0] & !state_tras[1] & !state_tras[2] & txd_buf[3];
A1L641_p3_out = key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !state_tras[1] & !state_tras[2] & txd_buf[3] & state_tras[3];
A1L641_p4_out = key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[1] & txd_buf[3] & !state_tras[3];
A1L641 = A1L541 # A1L641_p0_out # A1L641_p1_out # A1L641_p2_out # A1L641_p3_out # A1L641_p4_out;


--A1L241 is txd_buf[1]~610 at LC52
A1L241_p0_out = !state_tras[0] & txd_buf[1] & !state_tras[3] & !state_tras[1] & !state_tras[2];
A1L241_p1_out = !state_tras[0] & txd_buf[1] & txd_buf[2];
A1L241_p2_out = state_tras[0] & !send_state[2] & send_state[1] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[3] & state_tras[1] & state_tras[2];
A1L241_p3_out = !state_tras[0] & txd_buf[2] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[3] & !state_tras[1] & !state_tras[2];
A1L241_p4_out = txd_buf[1] & state_tras[3] & !state_tras[1] & state_tras[2];
A1L241 = A1L241_p0_out # A1L241_p1_out # A1L241_p2_out # A1L241_p3_out # A1L241_p4_out;


--A1L931 is txd_buf[0]~616 at LC49
A1L931_p1_out = send_state[1] & !send_state[2] & key_entry2 & state_tras[0] & state_tras[3] & state_tras[1] & state_tras[2] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
A1L931 = A1L931_p1_out;


--A1L041 is txd_buf[0]~618 at LC50
A1L041_p0_out = state_tras[0] & state_tras[3] & state_tras[1] & state_tras[2] & key_entry2 & A1L731 & !send_state[1] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
A1L041_p1_out = txd_buf[0] & !state_tras[0] & !state_tras[3] & !state_tras[1] & !state_tras[2];
A1L041_p2_out = txd_buf[0] & A1L531 & A1L66;
A1L041_p3_out = !state_tras[3] & A1L161 & txd_buf[1] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
A1L041_p4_out = state_tras[3] & !state_tras[1] & !state_tras[2] & key_entry2 & A1L631 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
A1L041 = A1L931 # A1L041_p0_out # A1L041_p1_out # A1L041_p2_out # A1L041_p3_out # A1L041_p4_out;


--A1L961 is txd_reg~69 at LC42
A1L961_p1_out = !state_tras[1] & !txd_buf[0] & state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & !state_tras[2] & !state_tras[0];
A1L961_p2_out = !state_tras[1] & !state_tras[3] & !state_tras[2] & !state_tras[0] & !txd_reg;
A1L961_p3_out = !txd_reg & A1L561;
A1L961 = A1L961_p1_out # A1L961_p2_out # A1L961_p3_out;


--~GND~9 is ~GND~9 at LC118
~GND~9_or_out = GND;
~GND~9 = ~GND~9_or_out;


--~GND~10 is ~GND~10 at LC117
~GND~10_or_out = GND;
~GND~10 = ~GND~10_or_out;


--~GND~11 is ~GND~11 at LC115
~GND~11_or_out = GND;
~GND~11 = ~GND~11_or_out;


--~GND~12 is ~GND~12 at LC109
~GND~12_or_out = GND;
~GND~12 = ~GND~12_or_out;


--~GND~13 is ~GND~13 at LC107
~GND~13_or_out = GND;
~GND~13 = ~GND~13_or_out;


--~GND~14 is ~GND~14 at LC105
~GND~14_or_out = GND;
~GND~14 = ~GND~14_or_out;


--~GND~15 is ~GND~15 at LC104
~GND~15_or_out = GND;
~GND~15 = ~GND~15_or_out;


--~GND~16 is ~GND~16 at LC101
~GND~16_or_out = GND;
~GND~16 = ~GND~16_or_out;


--~VCC~1 is ~VCC~1 at LC94
~VCC~1_or_out = GND;
~VCC~1 = !(~VCC~1_or_out);


--~GND~17 is ~GND~17 at LC37
~GND~17_or_out = GND;
~GND~17 = ~GND~17_or_out;


--A1L46 is reduce_nor~133sexp at SEXP17
A1L46 = EXP(div_reg[1] & div_reg[0] & !div_reg[13] & !div_reg[15] & !div_reg[12] & div_reg[8] & !div_reg[3] & !div_reg[10] & !div_reg[4] & !div_reg[5] & !div_reg[2] & !div_reg[9] & !div_reg[6] & !div_reg[7] & !div_reg[11] & !div_reg[14]);


--A1L56 is reduce_nor~136sexp at SEXP79
A1L56 = EXP(div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1]);


--A1L921 is trasstart~50bal at LC63
A1L921_p1_out = send_state[0] & send_state[2] & send_state[1];
A1L921_or_out = A1L921_p1_out;
A1L921 = !(A1L921_or_out);


--rst is rst at PIN_1
--operation mode is input

rst = INPUT();


--clk is clk at PIN_83
--operation mode is input

clk = INPUT();


--key_input is key_input at PIN_35
--operation mode is input

key_input = INPUT();


--rxd is rxd at PIN_25
--operation mode is input

rxd = INPUT();


--en[0] is en[0] at PIN_75
--operation mode is output

en[0] = OUTPUT(~GND~9);


--en[1] is en[1] at PIN_74
--operation mode is output

en[1] = OUTPUT(~GND~10);


--en[2] is en[2] at PIN_73
--operation mode is output

en[2] = OUTPUT(~GND~11);


--en[3] is en[3] at PIN_70
--operation mode is output

en[3] = OUTPUT(~GND~12);


--en[4] is en[4] at PIN_69
--operation mode is output

en[4] = OUTPUT(~GND~13);


--en[5] is en[5] at PIN_68
--operation mode is output

en[5] = OUTPUT(~GND~14);


--en[6] is en[6] at PIN_67
--operation mode is output

en[6] = OUTPUT(~GND~15);


--en[7] is en[7] at PIN_65
--operation mode is output

en[7] = OUTPUT(~GND~16);


--seg_data[0] is seg_data[0] at PIN_61
--operation mode is output

seg_data[0] = OUTPUT(~VCC~1);


--lowbit is lowbit at PIN_30
--operation mode is output

lowbit = OUTPUT(~GND~17);


--seg_data[3] is seg_data[3] at PIN_58
--operation mode is output

seg_data[3] = OUTPUT(A1L76);


--seg_data[2] is seg_data[2] at PIN_56
--operation mode is output

seg_data[2] = OUTPUT(A1L96);


--seg_data[1] is seg_data[1] at PIN_64
--operation mode is output

seg_data[1] = OUTPUT(A1L17);


--seg_data[4] is seg_data[4] at PIN_60
--operation mode is output

seg_data[4] = OUTPUT(A1L37);


--seg_data[5] is seg_data[5] at PIN_63
--operation mode is output

seg_data[5] = OUTPUT(A1L47);


--seg_data[6] is seg_data[6] at PIN_55
--operation mode is output

seg_data[6] = OUTPUT(A1L67);


--seg_data[7] is seg_data[7] at PIN_57
--operation mode is output

seg_data[7] = OUTPUT(A1L77);


--txd is txd at PIN_27
--operation mode is output

txd = OUTPUT(txd_reg);






--A1L97 is reduce_or~4867 at SEXP99
A1L97 = EXP(rxd_buf[0] & rxd_buf[1]);


--A1L161 is txd_buf[5]~624 at SEXP59
A1L161 = EXP(!state_tras[0] & !state_tras[1] & !state_tras[2]);


--A1L261 is txd_buf[5]~625 at SEXP58
A1L261 = EXP(state_tras[2] & state_tras[0]);


--A1L131 is trasstart~58 at SEXP54
A1L131 = EXP(state_tras[0] & state_tras[1]);


--A1L361 is txd_buf[5]~626 at SEXP35
A1L361 = EXP(!state_tras[0] & !state_tras[1] & !state_tras[2]);


--A1L451 is txd_buf[4]~627 at SEXP34
A1L451 = EXP(!state_tras[1] & !state_tras[2]);


--A1L461 is txd_buf[5]~628 at SEXP65
A1L461 = EXP(div8_tras_reg[1] & div8_tras_reg[0] & div8_tras_reg[2] & key_entry2);


--A1L66 is reduce_nor~137 at SEXP49
A1L66 = EXP(div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1]);


--A1L561 is txd_buf[5]~629 at SEXP33
A1L561 = EXP(div8_tras_reg[1] & div8_tras_reg[0] & div8_tras_reg[2] & key_entry2);