serial.fit.eqn

CPLD VHDL CODE非常好的参考资料

--rxd_buf[0] is rxd_buf[0] at LC81
rxd_buf[0]_p1_out = rxd_buf[1] & A1L19;
rxd_buf[0]_p2_out = !A1L19 & rxd_buf[0];
rxd_buf[0]_or_out = rxd_buf[0]_p1_out # rxd_buf[0]_p2_out;
rxd_buf[0]_reg_input = rxd_buf[0]_or_out;
rxd_buf[0] = DFFE(rxd_buf[0]_reg_input, clkbaud8x, GLOBAL(rst), , );


--txd_buf[6] is txd_buf[6] at LC74
txd_buf[6]_p0_out = div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[0] & key_entry2 & txd_buf[6] & state_tras[1] & state_tras[2] & send_state[2] & send_state[1];
txd_buf[6]_p1_out = !state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[0] & key_entry2 & txd_buf[6];
txd_buf[6]_p2_out = !state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & txd_buf[6] & state_tras[1];
txd_buf[6]_p4_out = !state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & txd_buf[6] & state_tras[2];
txd_buf[6]_or_out = A1L761 # txd_buf[6]_p0_out # txd_buf[6]_p1_out # txd_buf[6]_p2_out # txd_buf[6]_p4_out;
txd_buf[6]_reg_input = txd_buf[6]_or_out;
txd_buf[6] = TFFE(txd_buf[6]_reg_input, clkbaud8x, GLOBAL(rst), , );


--A1L76 is reduce_or~4815 at LC91
A1L76_p1_out = !rxd_buf[3] & !rxd_buf[7] & !rxd_buf[5] & !rxd_buf[4] & rxd_buf[6] & rxd_buf[2];
A1L76_p2_out = !rxd_buf[3] & !rxd_buf[7] & !rxd_buf[5] & !rxd_buf[4] & rxd_buf[6] & rxd_buf[1];
A1L76_p3_out = !rxd_buf[3] & !rxd_buf[7] & rxd_buf[5] & rxd_buf[4] & !rxd_buf[6] & rxd_buf[1] & !rxd_buf[0];
A1L76_p4_out = !rxd_buf[7] & rxd_buf[5] & rxd_buf[4] & !rxd_buf[6] & !rxd_buf[2] & !rxd_buf[1] & !rxd_buf[0];
A1L76_or_out = A1L76_p1_out # A1L76_p2_out # A1L76_p3_out # A1L76_p4_out;
A1L76 = !(A1L76_or_out);


--A1L86 is reduce_or~4817 at SEXP81
A1L86 = EXP(rxd_buf[0] & rxd_buf[1]);


--A1L96 is reduce_or~4823 at LC86
A1L96_p0_out = !rxd_buf[3] & !rxd_buf[7] & rxd_buf[5] & rxd_buf[4] & !rxd_buf[6] & rxd_buf[2] & A1L86;
A1L96_p1_out = !rxd_buf[3] & !rxd_buf[7] & !rxd_buf[5] & !rxd_buf[4] & rxd_buf[6] & !rxd_buf[2] & rxd_buf[0];
A1L96_p2_out = !rxd_buf[3] & !rxd_buf[7] & !rxd_buf[5] & !rxd_buf[4] & rxd_buf[6] & rxd_buf[2] & !rxd_buf[0];
A1L96_p3_out = !rxd_buf[3] & !rxd_buf[7] & !rxd_buf[5] & !rxd_buf[4] & rxd_buf[6] & rxd_buf[1];
A1L96_p4_out = !rxd_buf[7] & rxd_buf[5] & rxd_buf[4] & !rxd_buf[6] & !rxd_buf[2] & !rxd_buf[0] & !rxd_buf[1];
A1L96_or_out = A1L96_p0_out # A1L96_p1_out # A1L96_p2_out # A1L96_p3_out # A1L96_p4_out;
A1L96 = !(A1L96_or_out);


--A1L07 is reduce_or~4825 at SEXP101
A1L07 = EXP(!rxd_buf[0] & !rxd_buf[1]);


--A1L17 is reduce_or~4831 at LC99
A1L17_p1_out = !rxd_buf[0] & !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & !rxd_buf[7] & rxd_buf[3] & !rxd_buf[2] & !rxd_buf[1];
A1L17_p2_out = !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & !rxd_buf[7] & !rxd_buf[3] & !rxd_buf[2] & rxd_buf[1];
A1L17_p3_out = rxd_buf[6] & !rxd_buf[4] & !rxd_buf[5] & !rxd_buf[7] & !rxd_buf[3] & A1L07;
A1L17_p4_out = !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & !rxd_buf[7] & !rxd_buf[3] & rxd_buf[2] & A1L97;
A1L17_or_out = A1L17_p1_out # A1L17_p2_out # A1L17_p3_out # A1L17_p4_out;
A1L17 = !(A1L17_or_out);


--A1L27 is reduce_or~4834 at SEXP82
A1L27 = EXP(rxd_buf[0] & rxd_buf[2]);


--A1L37 is reduce_or~4840 at LC93
A1L37_p0_out = !rxd_buf[7] & rxd_buf[1] & !rxd_buf[6] & rxd_buf[5] & rxd_buf[4] & !rxd_buf[3] & A1L27;
A1L37_p1_out = !rxd_buf[0] & !rxd_buf[7] & !rxd_buf[1] & !rxd_buf[2] & !rxd_buf[6] & rxd_buf[5] & rxd_buf[4];
A1L37_p2_out = rxd_buf[0] & !rxd_buf[7] & !rxd_buf[1] & rxd_buf[2] & !rxd_buf[6] & rxd_buf[5] & rxd_buf[4] & !rxd_buf[3];
A1L37_p3_out = rxd_buf[0] & !rxd_buf[7] & rxd_buf[1] & !rxd_buf[2] & rxd_buf[6] & !rxd_buf[5] & !rxd_buf[4] & !rxd_buf[3];
A1L37_p4_out = !rxd_buf[7] & rxd_buf[2] & rxd_buf[6] & !rxd_buf[5] & !rxd_buf[4] & !rxd_buf[3] & A1L86;
A1L37_or_out = A1L37_p0_out # A1L37_p1_out # A1L37_p2_out # A1L37_p3_out # A1L37_p4_out;
A1L37 = !(A1L37_or_out);


--A1L47 is reduce_or~4847 at LC97
A1L47_p0_out = !rxd_buf[3] & !rxd_buf[7] & rxd_buf[6] & !rxd_buf[4] & !rxd_buf[5] & !rxd_buf[2] & rxd_buf[1];
A1L47_p1_out = !rxd_buf[3] & !rxd_buf[7] & !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & rxd_buf[0];
A1L47_p2_out = !rxd_buf[3] & !rxd_buf[7] & !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & rxd_buf[2];
A1L47_p3_out = !rxd_buf[7] & !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & !rxd_buf[0] & !rxd_buf[2] & !rxd_buf[1];
A1L47_p4_out = !rxd_buf[3] & !rxd_buf[7] & rxd_buf[6] & !rxd_buf[4] & !rxd_buf[5] & rxd_buf[0] & !rxd_buf[1];
A1L47_or_out = A1L47_p0_out # A1L47_p1_out # A1L47_p2_out # A1L47_p3_out # A1L47_p4_out;
A1L47 = !(A1L47_or_out);


--A1L57 is reduce_or~4849 at SEXP83
A1L57 = EXP(rxd_buf[3] & rxd_buf[2]);


--A1L67 is reduce_or~4855 at LC85
A1L67_p0_out = !rxd_buf[7] & rxd_buf[5] & !rxd_buf[6] & !rxd_buf[0] & !rxd_buf[1] & rxd_buf[4] & A1L57;
A1L67_p1_out = !rxd_buf[3] & !rxd_buf[7] & !rxd_buf[5] & rxd_buf[6] & rxd_buf[0] & !rxd_buf[1] & !rxd_buf[4];
A1L67_p2_out = !rxd_buf[3] & !rxd_buf[7] & !rxd_buf[5] & rxd_buf[6] & !rxd_buf[0] & rxd_buf[1] & !rxd_buf[4] & !rxd_buf[2];
A1L67_p3_out = !rxd_buf[3] & !rxd_buf[7] & rxd_buf[5] & !rxd_buf[6] & rxd_buf[4] & !rxd_buf[2];
A1L67_p4_out = !rxd_buf[3] & !rxd_buf[7] & rxd_buf[5] & !rxd_buf[6] & rxd_buf[0] & rxd_buf[1] & rxd_buf[4];
A1L67_or_out = A1L67_p0_out # A1L67_p1_out # A1L67_p2_out # A1L67_p3_out # A1L67_p4_out;
A1L67 = !(A1L67_or_out);


--A1L77 is reduce_or~4862 at LC88
A1L77_p0_out = !rxd_buf[4] & rxd_buf[0] & !rxd_buf[7] & !rxd_buf[1] & rxd_buf[6] & !rxd_buf[5] & !rxd_buf[3] & !rxd_buf[2];
A1L77_p1_out = !rxd_buf[4] & !rxd_buf[0] & !rxd_buf[7] & rxd_buf[1] & rxd_buf[6] & !rxd_buf[5] & !rxd_buf[3];
A1L77_p2_out = rxd_buf[4] & rxd_buf[0] & !rxd_buf[7] & !rxd_buf[6] & rxd_buf[5] & !rxd_buf[3] & rxd_buf[2];
A1L77_p3_out = !rxd_buf[4] & !rxd_buf[0] & !rxd_buf[7] & rxd_buf[6] & !rxd_buf[5] & !rxd_buf[3] & rxd_buf[2];
A1L77_p4_out = !rxd_buf[4] & !rxd_buf[7] & rxd_buf[1] & rxd_buf[6] & !rxd_buf[5] & !rxd_buf[3] & rxd_buf[2];
A1L77_or_out = A1L87 # A1L77_p0_out # A1L77_p1_out # A1L77_p2_out # A1L77_p3_out # A1L77_p4_out;
A1L77 = !(A1L77_or_out);


--A1L651 is txd_buf[5]~505 at SEXP60
A1L651 = EXP(div8_tras_reg[1] & div8_tras_reg[0] & div8_tras_reg[2] & key_entry2);


--A1L751 is txd_buf[5]~506 at SEXP71
A1L751 = EXP(!state_tras[0] & !state_tras[1] & !state_tras[2]);


--A1L851 is txd_buf[5]~507 at SEXP76
A1L851 = EXP(send_state[2] & send_state[1]);


--A1L951 is txd_buf[5]~508 at SEXP77
A1L951 = EXP(state_tras[2] & state_tras[0]);


--txd_buf[5] is txd_buf[5] at LC70
txd_buf[5]_p0_out = !key_entry2 & key_entry1;
txd_buf[5]_p1_out = A1L751 & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !state_tras[3] & txd_buf[6];
txd_buf[5]_p2_out = key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[3] & A1L851 & state_tras[0] & state_tras[1] & state_tras[2];
txd_buf[5]_p4_out = state_tras[3] & state_tras[1] & A1L951 & txd_buf[5];
txd_buf[5]_or_out = A1L061 # txd_buf[5]_p0_out # txd_buf[5]_p1_out # txd_buf[5]_p2_out # txd_buf[5]_p4_out;
txd_buf[5]_reg_input = txd_buf[5]_or_out;
txd_buf[5] = DFFE(txd_buf[5]_reg_input, clkbaud8x, GLOBAL(rst), , );


--A1L251 is txd_buf[4]~517 at SEXP78
A1L251 = EXP(!state_tras[1] & !state_tras[2]);


--txd_buf[4] is txd_buf[4] at LC72
txd_buf[4]_p0_out = key_entry2 & !txd_buf[4] & state_tras[3] & A1L251;
txd_buf[4]_p1_out = key_entry2 & !txd_buf[4] & A1L56;
txd_buf[4]_p2_out = key_entry2 & !txd_buf[4] & !state_tras[0] & !state_tras[1] & !state_tras[3] & !state_tras[2];
txd_buf[4]_p4_out = key_entry2 & !state_tras[3] & A1L751 & !txd_buf[5] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
txd_buf[4]_or_out = A1L351 # txd_buf[4]_p0_out # txd_buf[4]_p1_out # txd_buf[4]_p2_out # txd_buf[4]_p4_out;
txd_buf[4]_reg_input = !(txd_buf[4]_or_out);
txd_buf[4] = DFFE(txd_buf[4]_reg_input, clkbaud8x, GLOBAL(rst), , );


--txd_buf[3] is txd_buf[3] at LC68
txd_buf[3]_p0_out = div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & state_tras[1] & state_tras[0] & state_tras[3] & state_tras[2] & txd_buf[3] & !send_state[0] & send_state[1];
txd_buf[3]_p1_out = div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & !state_tras[1] & state_tras[0] & state_tras[3] & !state_tras[2] & txd_buf[3];
txd_buf[3]_p2_out = div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & state_tras[1] & state_tras[0] & state_tras[3] & state_tras[2] & txd_buf[3] & !send_state[2] & !send_state[0];
txd_buf[3]_p4_out = div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & state_tras[1] & state_tras[0] & state_tras[3] & state_tras[2] & txd_buf[3] & send_state[2] & send_state[0];
txd_buf[3]_or_out = A1L051 # txd_buf[3]_p0_out # txd_buf[3]_p1_out # txd_buf[3]_p2_out # txd_buf[3]_p4_out;
txd_buf[3]_reg_input = txd_buf[3]_or_out;
txd_buf[3] = TFFE(txd_buf[3]_reg_input, clkbaud8x, GLOBAL(rst), , );


--txd_buf[2] is txd_buf[2] at LC57
txd_buf[2]_p0_out = txd_buf[2] & !key_entry2;
txd_buf[2]_p1_out = state_tras[3] & state_tras[1] & !state_tras[2] & txd_buf[2];
txd_buf[2]_p2_out = state_tras[3] & state_tras[2] & txd_buf[2] & !state_tras[0];
txd_buf[2]_p4_out = !state_tras[3] & !state_tras[1] & !state_tras[2] & txd_buf[2] & !state_tras[0];
txd_buf[2]_or_out = A1L641 # txd_buf[2]_p0_out # txd_buf[2]_p1_out # txd_buf[2]_p2_out # txd_buf[2]_p4_out;
txd_buf[2]_reg_input = txd_buf[2]_or_out;
txd_buf[2] = DFFE(txd_buf[2]_reg_input, clkbaud8x, GLOBAL(rst), , );


--txd_buf[1] is txd_buf[1] at LC53
txd_buf[1]_p0_out = !key_entry2 & key_entry1;
txd_buf[1]_p1_out = A1L651 & txd_buf[1];
txd_buf[1]_p2_out = A1L161 & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !state_tras[3] & txd_buf[2];
txd_buf[1]_p4_out = txd_buf[1] & state_tras[3] & A1L261 & state_tras[1];
txd_buf[1]_or_out = A1L241 # txd_buf[1]_p0_out # txd_buf[1]_p1_out # txd_buf[1]_p2_out # txd_buf[1]_p4_out;
txd_buf[1]_reg_input = txd_buf[1]_or_out;
txd_buf[1] = DFFE(txd_buf[1]_reg_input, clkbaud8x, GLOBAL(rst), , );


--A1L531 is txd_buf[0]~548 at SEXP61
A1L531 = EXP(!state_tras[0] & !state_tras[1] & !state_tras[2] & !state_tras[3]);


--A1L631 is txd_buf[0]~550 at SEXP62
A1L631 = EXP(!state_tras[0] & !txd_buf[1]);


--A1L731 is txd_buf[0]~551 at SEXP63
A1L731 = EXP(send_state[0] & !send_state[2]);


--A1L831 is txd_buf[0]~552 at SEXP64
A1L831 = EXP(!key_entry1 & !txd_buf[0]);


--txd_buf[0] is txd_buf[0] at LC51
txd_buf[0]_p0_out = key_entry2 & !state_tras[1] & !state_tras[2] & state_tras[0] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & txd_buf[1];
txd_buf[0]_p1_out = A1L831 & !key_entry2;
txd_buf[0]_p2_out = A1L261 & txd_buf[0] & state_tras[3] & state_tras[1];
txd_buf[0]_p4_out = txd_buf[0] & state_tras[3] & A1L131 & state_tras[2];
txd_buf[0]_or_out = A1L041 # txd_buf[0]_p0_out # txd_buf[0]_p1_out # txd_buf[0]_p2_out # txd_buf[0]_p4_out;
txd_buf[0]_reg_input = txd_buf[0]_or_out;
txd_buf[0] = DFFE(txd_buf[0]_reg_input, clkbaud8x, GLOBAL(rst), , );


--txd_reg is txd_reg at LC43
txd_reg_p0_out = state_tras[3] & A1L451 & !txd_reg;
txd_reg_p1_out = A1L361 & !txd_buf[0] & !state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2;
txd_reg_p2_out = !state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & A1L921 & !state_tras[1] & !state_tras[2] & trasstart & !state_tras[0];
txd_reg_or_out = A1L961 # txd_reg_p0_out # txd_reg_p1_out # txd_reg_p2_out;
txd_reg_reg_input = !(txd_reg_or_out);
txd_reg = DFFE(txd_reg_reg_input, clkbaud8x, , rst, );


--A1L761 is txd_buf[6]~562 at LC73
A1L761_p0_out = state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !state_tras[0] & !state_tras[1] & key_entry2 & !state_tras[2] & txd_buf[6];
A1L761_p1_out = state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[0] & !state_tras[1] & key_entry2 & !state_tras[2] & !txd_buf[6];
A1L761_p2_out = state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[0] & state_tras[1] & key_entry2 & state_tras[2] & !txd_buf[6] & !send_state[2];
A1L761_p3_out = state_tras[3] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[0] & state_tras[1] & key_entry2 & state_tras[2] & !txd_buf[6] & !send_state[1];
A1L761_p4_out = !key_entry2 & !txd_buf[6] & key_entry1;
A1L761 = A1L761_p0_out # A1L761_p1_out # A1L761_p2_out # A1L761_p3_out # A1L761_p4_out;


--A1L87 is reduce_or~4864 at LC87
A1L87_p1_out = rxd_buf[4] & !rxd_buf[0] & !rxd_buf[7] & !rxd_buf[1] & !rxd_buf[2] & !rxd_buf[6] & rxd_buf[5];
A1L87_p2_out = rxd_buf[4] & !rxd_buf[7] & rxd_buf[1] & !rxd_buf[6] & rxd_buf[5] & !rxd_buf[3];
A1L87 = A1L87_p1_out # A1L87_p2_out;


--A1L061 is txd_buf[5]~568 at LC69
A1L061_p0_out = txd_buf[5] & A1L461;
A1L061_p1_out = !state_tras[0] & txd_buf[6] & txd_buf[5];
A1L061_p2_out = !state_tras[0] & txd_buf[6] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[3] & !state_tras[1] & !state_tras[2];
A1L061_p3_out = txd_buf[5] & state_tras[3] & !state_tras[1] & state_tras[2];
A1L061_p4_out = !state_tras[0] & txd_buf[5] & !state_tras[3] & !state_tras[1] & !state_tras[2];
A1L061 = A1L061_p0_out # A1L061_p1_out # A1L061_p2_out # A1L061_p3_out # A1L061_p4_out;


--A1L351 is txd_buf[4]~574 at LC71
A1L351_p1_out = !txd_buf[5] & !state_tras[0] & !state_tras[1] & key_entry2 & state_tras[3] & !state_tras[2] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
A1L351_p2_out = state_tras[0] & state_tras[1] & key_entry2 & state_tras[3] & state_tras[2] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
A1L351_p3_out = !txd_buf[5] & !state_tras[0] & key_entry2 & !txd_buf[4];
A1L351_p4_out = !key_entry2 & !txd_buf[4] & !key_entry1;
A1L351 = A1L351_p1_out # A1L351_p2_out # A1L351_p3_out # A1L351_p4_out;


--A1L841 is txd_buf[3]~579 at LC65
A1L841_p1_out = txd_buf[4] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & state_tras[0] & !state_tras[3] & !txd_buf[3];
A1L841 = A1L841_p1_out;


--A1L941 is txd_buf[3]~581 at LC66
A1L941_p0_out = div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & state_tras[1] & state_tras[3] & !txd_buf[3] & state_tras[2] & state_tras[0] & send_state[2] & !send_state[0] & !send_state[1];
A1L941_p1_out = txd_buf[4] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & state_tras[1] & !state_tras[3] & !txd_buf[3];
A1L941_p2_out = txd_buf[4] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & !state_tras[3] & !txd_buf[3] & state_tras[2];
A1L941_p3_out = txd_buf[4] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & !state_tras[1] & state_tras[3] & !txd_buf[3] & !state_tras[2] & !state_tras[0];
A1L941_p4_out = div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & key_entry2 & state_tras[1] & state_tras[3] & !txd_buf[3] & state_tras[2] & state_tras[0] & !send_state[2] & send_state[0];
A1L941 = A1L841 # A1L941_p0_out # A1L941_p1_out # A1L941_p2_out # A1L941_p3_out # A1L941_p4_out;


--A1L051 is txd_buf[3]~587 at LC67
A1L051_p0_out = key_entry2 & txd_buf[3] & !txd_buf[4] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[3] & !state_tras[1] & !state_tras[2];
A1L051_p1_out = key_entry1 & !key_entry2 & txd_buf[3];
A1L051_p2_out = key_entry2 & txd_buf[3] & !txd_buf[4] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[0] & !state_tras[3];
A1L051_p3_out = key_entry2 & txd_buf[3] & !txd_buf[4] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !state_tras[3] & state_tras[1];
A1L051_p4_out = key_entry2 & txd_buf[3] & !txd_buf[4] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !state_tras[3] & state_tras[2];
A1L051 = A1L941 # A1L051_p0_out # A1L051_p1_out # A1L051_p2_out # A1L051_p3_out # A1L051_p4_out;


--A1L441 is txd_buf[2]~593 at LC54
A1L441_p1_out = !div8_tras_reg[1] & txd_buf[2];
A1L441_p2_out = txd_buf[2] & !div8_tras_reg[0];
A1L441_p3_out = txd_buf[2] & !div8_tras_reg[2];
A1L441_p4_out = txd_buf[2] & !state_tras[2] & txd_buf[3];
A1L441 = A1L441_p1_out # A1L441_p2_out # A1L441_p3_out # A1L441_p4_out;


--A1L541 is txd_buf[2]~598 at LC55
A1L541_p0_out = state_tras[0] & state_tras[3] & !state_tras[1] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !state_tras[2];
A1L541_p1_out = !send_state[1] & txd_buf[3] & txd_buf[2];
A1L541_p2_out = txd_buf[2] & state_tras[0] & state_tras[3] & !state_tras[1];
A1L541_p3_out = !send_state[1] & state_tras[0] & state_tras[3] & state_tras[1] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[2];
A1L541_p4_out = state_tras[0] & state_tras[3] & state_tras[1] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & state_tras[2] & send_state[0] & !send_state[2];
A1L541 = A1L441 # A1L541_p0_out # A1L541_p1_out # A1L541_p2_out # A1L541_p3_out # A1L541_p4_out;