serial.map.summary

CPLD VHDL CODE非常好的参考资料

Flow Status : Successful - Mon Nov 21 17:11:45 2005
Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
Revision Name : serial
Top-level Entity Name : serial
Family : MAX7000S
Device : EPM7128SLC84-15
Timing Models : Final
Met timing requirements : N/A
Total macrocells : 112
Total pins : 22