state_machine.map.qmsg

CPLD VHDL CODE非常好的参考资料

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Dec 13 17:36:42 2005 " "Info: Processing started: Tue Dec 13 17:36:42 2005" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off state_machine -c state_machine " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off state_machine -c state_machine" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "state_machine.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file state_machine.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 state_machine-arch " "Info: Found design unit 1: state_machine-arch" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 18 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 state_machine " "Info: Found entity 1: state_machine" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 10 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "state_machine " "Info: Elaborating entity \"state_machine\" for the top level hierarchy" {  } {  } 0}
{ "Info" "IVRFX_VHDL_CASE_STATEMENT_OTHERS_CLAUSE_NEVER_SELECTED" "state_machine.vhd(60) " "Info: VHDL Case Statement information at state_machine.vhd(60): OTHERS choice is never selected" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 60 0 0 } }  } 0}
{ "Info" "IVRFX_VHDL_CASE_STATEMENT_OTHERS_CLAUSE_NEVER_SELECTED" "state_machine.vhd(87) " "Info: VHDL Case Statement information at state_machine.vhd(87): OTHERS choice is never selected" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 87 0 0 } }  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "cnt\[0\]~0 24 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=24) from the following logic: \"cnt\[0\]~0\"" {  } { { "state_machine.vhd" "cnt\[0\]~0" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 30 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 227 1 0 } }  } 0}  } {  } 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "c\[0\] VCC " "Warning: Pin \"c\[0\]\" stuck at VCC" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 14 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "en\[0\] GND " "Warning: Pin \"en\[0\]\" stuck at GND" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 15 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "en\[1\] GND " "Warning: Pin \"en\[1\]\" stuck at GND" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 15 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "en\[2\] GND " "Warning: Pin \"en\[2\]\" stuck at GND" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 15 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "en\[3\] GND " "Warning: Pin \"en\[3\]\" stuck at GND" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 15 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "en\[4\] GND " "Warning: Pin \"en\[4\]\" stuck at GND" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 15 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "en\[5\] GND " "Warning: Pin \"en\[5\]\" stuck at GND" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 15 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "en\[6\] GND " "Warning: Pin \"en\[6\]\" stuck at GND" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 15 -1 0 } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "en\[7\] GND " "Warning: Pin \"en\[7\]\" stuck at GND" {  } { { "state_machine.vhd" "" { Text "E:/Cindy/DevelopBoard/Mars-7128/示例程序/VHDL/基础实验/简单状态机/state_machine.vhd" 15 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "clk " "Info: Promoted clock signal driven by pin \"clk\" to global clock signal" {  } {  } 0} { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLEAR" "rst " "Info: Promoted clear signal driven by pin \"rst\" to global clear signal" {  } {  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "61 " "Info: Implemented 61 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "16 " "Info: Implemented 16 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_MCELLS" "43 " "Info: Implemented 43 macrocells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 10 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 10 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Dec 13 17:36:46 2005 " "Info: Processing ended: Tue Dec 13 17:36:46 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0}  } {  } 0}