sub.map.rpt

CPLD VHDL CODE非常好的参考资料

; a_csnbuffer.tdf                  ; yes             ; Megafunction    ; d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf         ;
; altshift.tdf                     ; yes             ; Megafunction    ; d:/altera/quartus50/libraries/megafunctions/altshift.tdf            ;
+----------------------------------+-----------------+-----------------+---------------------------------------------------------------------+


+---------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+----------------------+----------------------+
; Resource             ; Usage                ;
+----------------------+----------------------+
; Logic cells          ; 62                   ;
; Total registers      ; 0                    ;
; I/O pins             ; 24                   ;
; Shareable expanders  ; 19                   ;
; Parallel expanders   ; 16                   ;
; Maximum fan-out node ; b[0]                 ;
; Maximum fan-out      ; 59                   ;
; Total fan-out        ; 513                  ;
; Average fan-out      ; 4.89                 ;
+----------------------+----------------------+


+---------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                       ;
+------------------------------------+------------+------+------------------------------------------------------------------+
; Compilation Hierarchy Node         ; Macrocells ; Pins ; Full Hierarchy Name                                              ;
+------------------------------------+------------+------+------------------------------------------------------------------+
; |sub                               ; 62         ; 24   ; |sub                                                             ;
;    |lpm_add_sub:add_rtl_0|         ; 7          ; 0    ; |sub|lpm_add_sub:add_rtl_0                                       ;
;       |addcore:adder|              ; 7          ; 0    ; |sub|lpm_add_sub:add_rtl_0|addcore:adder                         ;
;          |a_csnbuffer:result_node| ; 7          ; 0    ; |sub|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node ;
+------------------------------------+------------+------+------------------------------------------------------------------+


+------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: lpm_add_sub:add_rtl_0 ;
+------------------------+-------------+---------------------------------+
; Parameter Name         ; Value       ; Type                            ;
+------------------------+-------------+---------------------------------+
; LPM_WIDTH              ; 5           ; Untyped                         ;
; LPM_REPRESENTATION     ; UNSIGNED    ; Untyped                         ;
; LPM_DIRECTION          ; ADD         ; Untyped                         ;
; ONE_INPUT_IS_CONSTANT  ; NO          ; Untyped                         ;
; LPM_PIPELINE           ; 0           ; Untyped                         ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                         ;
; REGISTERED_AT_END      ; 0           ; Untyped                         ;
; OPTIMIZE_FOR_SPEED     ; 9           ; Untyped                         ;
; USE_CS_BUFFERS         ; 1           ; Untyped                         ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                         ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH              ;
; DEVICE_FAMILY          ; MAX7000S    ; Untyped                         ;
; USE_WYS                ; OFF         ; Untyped                         ;
; STYLE                  ; FAST        ; Untyped                         ;
; CBXI_PARAMETER         ; add_sub_4kh ; Untyped                         ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                      ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                    ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                    ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                  ;
+------------------------+-------------+---------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in E:/work1/sub/sub.map.eqn.


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
    Info: Processing started: Fri Sep 23 17:10:06 2005
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off sub -c sub
Info: Found 2 design units, including 1 entities, in source file sub.vhd
    Info: Found design unit 1: sub-arch
    Info: Found entity 1: sub
Info: Elaborating entity "sub" for the top level hierarchy
Info: VHDL Case Statement information at sub.vhd(58): OTHERS choice is never selected
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "c[0]" stuck at VCC
    Warning: Pin "en[0]" stuck at GND
    Warning: Pin "en[1]" stuck at GND
    Warning: Pin "en[2]" stuck at GND
    Warning: Pin "en[3]" stuck at GND
    Warning: Pin "en[4]" stuck at GND
    Warning: Pin "en[5]" stuck at GND
    Warning: Pin "en[6]" stuck at GND
    Warning: Pin "en[7]" stuck at GND
Info: Implemented 105 device resources after synthesis - the final resource count might be different
    Info: Implemented 8 input pins
    Info: Implemented 16 output pins
    Info: Implemented 62 macrocells
    Info: Implemented 19 shareable expanders
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 10 warnings
    Info: Processing ended: Fri Sep 23 17:10:39 2005
    Info: Elapsed time: 00:00:33