sub.map.eqn

CPLD VHDL CODE非常好的参考资料

--E3L9 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|sout_node[4]~58
E3L9_p1_out = !a[2] & b[1] & b[0] & !a[0];
E3L9_p2_out = !a[2] & b[1] & !a[1];
E3L9_p3_out = !a[2] & b[2];
E3L9 = E3L9_p1_out # E3L9_p2_out # E3L9_p3_out;


--A1L97 is Mux~1298
A1L97_p0_out = !a[3] & b[3] & !a[1] & !a[2] & !b[0] & a[0];
A1L97_p1_out = !a[3] & !b[3] & !a[1] & !b[1] & a[2] & !b[2];
A1L97_p2_out = !a[3] & b[3] & !a[1] & !b[1] & !a[2] & b[2];
A1L97_p3_out = a[3] & !b[3] & !a[1] & !b[1] & !a[2] & b[2];
A1L97_p4_out = a[3] & !b[3] & !a[1] & !a[2] & !b[0] & a[0];
A1L97 = A1L97_p0_out # A1L97_p1_out # A1L97_p2_out # A1L97_p3_out # A1L97_p4_out;


--A1L08 is Mux~1304
A1L08_p0_out = !a[3] & b[3] & a[1] & b[1] & !a[2] & b[2];
A1L08_p1_out = a[3] & b[3] & !a[1] & !b[1] & a[2] & !b[2];
A1L08_p2_out = !a[3] & !b[3] & a[1] & b[1] & a[2] & !b[2];
A1L08_p3_out = !a[3] & b[3] & !a[1] & b[2] & !b[0] & a[0];
A1L08_p4_out = a[3] & !b[3] & !a[1] & b[2] & !b[0] & a[0];
A1L08 = A1L97 # A1L08_p0_out # A1L08_p1_out # A1L08_p2_out # A1L08_p3_out # A1L08_p4_out;


--A1L18 is Mux~1310
A1L18_p0_out = !a[3] & !b[3] & !b[0] & a[2] & a[0] & !b[1];
A1L18_p1_out = !a[3] & b[3] & b[0] & !a[2] & !a[0];
A1L18_p2_out = a[3] & !b[3] & b[0] & !a[2] & !a[0];
A1L18_p3_out = a[3] & !b[3] & b[0] & !a[0] & b[2];
A1L18_p4_out = !a[3] & b[3] & b[0] & !a[0] & b[2];
A1L18 = A1L18_p0_out # A1L18_p1_out # A1L18_p2_out # A1L18_p3_out # A1L18_p4_out;


--A1L28 is Mux~1316
A1L28_p0_out = !b[0] & b[1] & b[2] & a[0] & a[2] & a[1];
A1L28_p1_out = a[3] & b[3] & !b[0] & !b[1] & !b[2] & a[0];
A1L28_p2_out = !a[3] & !b[3] & !b[0] & !b[1] & !b[2] & a[0];
A1L28_p3_out = a[3] & b[3] & !b[0] & !b[2] & a[0] & a[2];
A1L28_p4_out = !a[3] & !b[3] & !b[0] & !b[2] & a[0] & a[2];
A1L28 = A1L18 # A1L28_p0_out # A1L28_p1_out # A1L28_p2_out # A1L28_p3_out # A1L28_p4_out;


--A1L38 is Mux~1322
A1L38_p0_out = b[0] & !a[1] & !b[1] & !a[3] & !b[3] & !a[0];
A1L38_p1_out = !b[0] & !a[1] & b[1] & !a[3] & !b[3];
A1L38_p2_out = a[1] & !b[1] & a[3] & !b[3] & !a[0];
A1L38_p3_out = a[1] & !b[1] & !a[3] & b[3] & !a[0];
A1L38_p4_out = !b[0] & !a[1] & b[1] & a[3] & b[3];
A1L38 = A1L38_p0_out # A1L38_p1_out # A1L38_p2_out # A1L38_p3_out # A1L38_p4_out;


--A1L48 is Mux~1328
A1L48_p0_out = !a[1] & !b[1] & a[3] & !b[3] & !b[0] & b[2];
A1L48_p1_out = !a[1] & b[1] & !a[2] & !a[3] & !b[3];
A1L48_p2_out = !a[1] & b[1] & !a[2] & a[3] & b[3];
A1L48_p3_out = !a[1] & !b[1] & !a[2] & a[3] & !b[3] & !b[0];
A1L48_p4_out = !a[1] & !b[1] & !a[3] & b[3] & !b[0] & b[2];
A1L48 = A1L48_p0_out # A1L48_p1_out # A1L48_p2_out # A1L48_p3_out # A1L48_p4_out;


--A1L58 is Mux~1334
A1L58_p0_out = b[0] & a[0] & !a[2] & !a[3] & b[3];
A1L58_p1_out = !b[0] & !a[0] & !a[2] & !a[3] & b[3];
A1L58_p2_out = !b[0] & !a[0] & !a[2] & a[3] & !b[3];
A1L58_p3_out = !b[0] & !a[0] & !a[3] & b[3] & b[2];
A1L58_p4_out = !b[0] & !a[0] & a[3] & !b[3] & b[2];
A1L58 = A1L58_p0_out # A1L58_p1_out # A1L58_p2_out # A1L58_p3_out # A1L58_p4_out;


--A1L68 is Mux~1340
A1L68_p0_out = b[0] & a[0] & b[2] & !a[3] & b[3];
A1L68_p1_out = b[0] & a[0] & a[1] & !b[1];
A1L68_p2_out = b[0] & a[0] & !a[1] & b[1];
A1L68_p3_out = !b[0] & !a[0] & a[1] & !b[1];
A1L68_p4_out = !b[0] & !a[0] & !a[1] & b[1];
A1L68 = A1L68_p0_out # A1L68_p1_out # A1L68_p2_out # A1L68_p3_out # A1L68_p4_out;


--A1L78 is Mux~1346
A1L78_p0_out = a[0] & !a[1] & a[2] & !b[2] & !b[0];
A1L78_p1_out = !a[0] & !a[1] & b[1] & !a[2] & !b[2];
A1L78_p2_out = !a[0] & !a[1] & b[1] & a[2] & b[2];
A1L78_p3_out = a[0] & b[1] & a[2] & !b[2] & !b[0];
A1L78_p4_out = a[0] & b[1] & !a[2] & b[2] & !b[0];
A1L78 = A1L78_p0_out # A1L78_p1_out # A1L78_p2_out # A1L78_p3_out # A1L78_p4_out;


--A1L88 is Mux~1352
A1L88_p0_out = a[0] & !b[1] & !a[1] & a[2] & !b[2] & a[3] & b[3] & b[0];
A1L88_p1_out = a[0] & b[1] & a[1] & a[2] & !b[2] & a[3] & b[3] & b[0];
A1L88_p2_out = a[0] & b[1] & a[1] & a[2] & !b[2] & !a[3] & !b[3] & b[0];
A1L88_p3_out = a[0] & b[1] & a[1] & !a[2] & b[2] & a[3] & !b[3] & b[0];
A1L88_p4_out = a[0] & b[1] & a[1] & !a[2] & b[2] & !a[3] & b[3] & b[0];
A1L88 = A1L88_p0_out # A1L88_p1_out # A1L88_p2_out # A1L88_p3_out # A1L88_p4_out;


--A1L98 is Mux~1358
A1L98_p0_out = !a[0] & !b[1] & !a[1] & !a[2] & b[2] & a[3] & !b[3] & !b[0];
A1L98_p1_out = !a[0] & b[1] & a[1] & !a[2] & b[2] & a[3] & !b[3] & !b[0];
A1L98_p2_out = !a[0] & b[1] & a[1] & !a[2] & b[2] & !a[3] & b[3] & !b[0];
A1L98_p3_out = !a[0] & !b[1] & !a[1] & a[2] & !b[2] & a[3] & b[3] & !b[0];
A1L98_p4_out = !a[0] & !b[1] & !a[1] & a[2] & !b[2] & !a[3] & !b[3] & !b[0];
A1L98 = A1L98_p0_out # A1L98_p1_out # A1L98_p2_out # A1L98_p3_out # A1L98_p4_out;


--A1L09 is Mux~1364
A1L09_p0_out = !a[0] & !b[1] & a[1] & a[2] & b[2] & a[3] & !b[3];
A1L09_p1_out = !a[0] & b[1] & !a[1] & !a[2] & b[2] & a[3] & b[3];
A1L09_p2_out = b[1] & !a[1] & !a[2] & b[2] & a[3] & b[3] & b[0];
A1L09_p3_out = !a[0] & b[1] & !a[1] & !a[2] & b[2] & !a[3] & !b[3];
A1L09_p4_out = b[1] & !a[1] & !a[2] & b[2] & !a[3] & !b[3] & b[0];
A1L09 = A1L09_p0_out # A1L09_p1_out # A1L09_p2_out # A1L09_p3_out # A1L09_p4_out;


--A1L19 is Mux~1370
A1L19_p0_out = !a[0] & b[1] & !a[2] & b[2] & b[0] & !a[1];
A1L19_p1_out = !a[0] & !b[1] & !a[2] & !b[2] & b[0];
A1L19_p2_out = !a[0] & !a[2] & !b[2] & b[0] & a[1];
A1L19_p3_out = !a[0] & !b[1] & a[2] & b[2] & b[0];
A1L19_p4_out = !a[0] & a[2] & b[2] & b[0] & a[1];
A1L19 = A1L19_p0_out # A1L19_p1_out # A1L19_p2_out # A1L19_p3_out # A1L19_p4_out;


--~VCC~0 is ~VCC~0
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--~GND~0 is ~GND~0
~GND~0_or_out = GND;
~GND~0 = ~GND~0_or_out;


--~GND~1 is ~GND~1
~GND~1_or_out = GND;
~GND~1 = ~GND~1_or_out;


--~GND~2 is ~GND~2
~GND~2_or_out = GND;
~GND~2 = ~GND~2_or_out;


--~GND~3 is ~GND~3
~GND~3_or_out = GND;
~GND~3 = ~GND~3_or_out;


--~GND~4 is ~GND~4
~GND~4_or_out = GND;
~GND~4 = ~GND~4_or_out;


--~GND~5 is ~GND~5
~GND~5_or_out = GND;
~GND~5 = ~GND~5_or_out;


--~GND~6 is ~GND~6
~GND~6_or_out = GND;
~GND~6 = ~GND~6_or_out;


--~GND~7 is ~GND~7
~GND~7_or_out = GND;
~GND~7 = ~GND~7_or_out;


--A1L92 is Mux~1107sexp3
A1L92 = EXP(!b[0] & !b[1] & a[2] & !b[2] & a[0] & a[3] & !b[3] & !a[1]);


--A1L03 is Mux~1107sexp4
A1L03 = EXP(!b[0] & !b[1] & a[2] & !b[2] & a[0] & !a[3] & b[3] & !a[1]);


--A1L13 is Mux~1107sexp5
A1L13 = EXP(b[0] & !b[1] & a[2] & !b[2] & !a[0] & a[3] & !b[3] & a[1]);


--A1L23 is Mux~1113sexp1
A1L23 = EXP(!b[0] & !b[1] & a[2] & b[2] & a[0] & !a[3] & !b[3]);


--A1L33 is Mux~1113sexp2
A1L33 = EXP(!b[0] & a[2] & b[2] & a[0] & !a[3] & !b[3] & a[1]);


--A1L43 is Mux~1113sexp3
A1L43 = EXP(b[0] & !b[1] & a[2] & !b[2] & !a[0] & !a[3] & b[3] & a[1]);


--A1L53 is Mux~1113sexp4
A1L53 = EXP(!b[0] & !b[1] & !a[2] & b[2] & a[0] & a[3] & !b[3] & a[1]);


--A1L63 is Mux~1113sexp5
A1L63 = EXP(!b[0] & !b[1] & !a[2] & b[2] & a[0] & !a[3] & b[3] & a[1]);


--A1L07 is Mux~1259sexp5
A1L07 = EXP(!b[2] & !b[1] & a[2] & b[3] & a[3]);


--A1L44 is Mux~1156bal
A1L44_p0_out = b[1] & a[2] & !b[2] & !a[3] & b[3] & a[1] & !b[0] & a[0];
A1L44_p1_out = b[1] & !a[2] & b[2] & a[3] & !b[3] & !a[1];
A1L44_p2_out = b[1] & a[2] & !b[2] & a[3] & b[3] & !a[1];
A1L44_p3_out = !b[1] & a[2] & b[2] & a[3] & b[3] & a[1];
A1L44_p4_out = b[1] & a[2] & !b[2] & a[3] & !b[3] & a[1] & !b[0] & a[0];
A1L44_or_out = A1L44_p0_out # A1L44_p1_out # A1L44_p2_out # A1L44_p3_out # A1L44_p4_out;
A1L44 = !(A1L44_or_out);


--A1L77 is Mux~1295bal
A1L77_p0_out = !b[3] & !a[3] & !b[2] & a[1] & a[2];
A1L77_p1_out = !b[3] & a[3] & !a[0] & b[0];
A1L77_p2_out = !b[3] & !a[3] & b[2] & b[1] & !a[1] & !a[2];
A1L77_p3_out = b[3] & a[3] & b[2] & b[1] & !a[1] & !a[2];
A1L77_p4_out = !b[3] & !a[3] & !b[2] & !b[1] & a[2];
A1L77_or_out = A1L77_p0_out # A1L77_p1_out # A1L77_p2_out # A1L77_p3_out # A1L77_p4_out;
A1L77 = !(A1L77_or_out);


--A1L67 is Mux~1290bal
A1L67_p0_out = b[3] & !a[3] & !a[0] & b[0];
A1L67_p1_out = !b[2] & !a[2] & b[3] & !a[3];
A1L67_p2_out = b[1] & !a[1] & !a[0] & b[0];
A1L67_p3_out = !b[1] & a[1] & !a[0] & b[0];
A1L67_p4_out = b[2] & !a[2] & !a[0] & b[0];
A1L67_or_out = A1L67_p0_out # A1L67_p1_out # A1L67_p2_out # A1L67_p3_out # A1L67_p4_out;
A1L67 = !(A1L67_or_out);


--a[0] is a[0]
--operation mode is input

a[0] = INPUT();


--a[1] is a[1]
--operation mode is input

a[1] = INPUT();


--a[2] is a[2]
--operation mode is input

a[2] = INPUT();


--a[3] is a[3]
--operation mode is input

a[3] = INPUT();


--b[0] is b[0]
--operation mode is input

b[0] = INPUT();


--b[1] is b[1]
--operation mode is input

b[1] = INPUT();


--b[2] is b[2]
--operation mode is input

b[2] = INPUT();


--b[3] is b[3]
--operation mode is input

b[3] = INPUT();


--c[0] is c[0]
--operation mode is output

c[0] = OUTPUT(~VCC~0);


--en[0] is en[0]
--operation mode is output

en[0] = OUTPUT(~GND~0);


--en[1] is en[1]
--operation mode is output

en[1] = OUTPUT(~GND~1);


--en[2] is en[2]
--operation mode is output

en[2] = OUTPUT(~GND~2);


--en[3] is en[3]
--operation mode is output

en[3] = OUTPUT(~GND~3);


--en[4] is en[4]
--operation mode is output

en[4] = OUTPUT(~GND~4);


--en[5] is en[5]
--operation mode is output

en[5] = OUTPUT(~GND~5);


--en[6] is en[6]
--operation mode is output

en[6] = OUTPUT(~GND~6);


--en[7] is en[7]
--operation mode is output

en[7] = OUTPUT(~GND~7);


--c[2] is c[2]
--operation mode is output

c[2] = OUTPUT(A1L54);


--c[3] is c[3]
--operation mode is output

c[3] = OUTPUT(A1L35);


--c[7] is c[7]
--operation mode is output

c[7] = OUTPUT(A1L64);


--c[1] is c[1]
--operation mode is output

c[1] = OUTPUT(A1L95);


--c[4] is c[4]
--operation mode is output

c[4] = OUTPUT(A1L86);


--c[6] is c[6]
--operation mode is output

c[6] = OUTPUT(A1L96);


--c[5] is c[5]
--operation mode is output

c[5] = OUTPUT(A1L87);