sub.map.eqn

CPLD VHDL CODE非常好的参考资料

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--E3L1 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|sout_node[1]~24
E3L1_p1_out = b[0] & a[0];
E3L1_p2_out = !b[0] & !a[0];
E3L1_or_out = E3L1_p1_out # E3L1_p2_out;
E3L1 = E3L1_or_out;


--E3L2 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|sout_node[2]~25
E3L2_p1_out = b[0] & !a[0];
E3L2_p2_out = b[1] & a[1];
E3L2_p3_out = !b[1] & !a[1];
E3L2_or_out = E3L2_p2_out # E3L2_p3_out;
E3L2 = E3L2_p1_out $ E3L2_or_out;


--E3L3 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|sout_node[3]~30
E3L3_p0_out = a[1] & b[2] & a[2] & !b[1];
E3L3_p2_out = b[0] & !a[1] & b[2] & !a[2] & !b[1] & !a[0];
E3L3_p3_out = b[0] & !a[1] & !b[2] & a[2] & !b[1] & !a[0];
E3L3_p4_out = a[1] & !b[2] & !a[2] & !b[1];
E3L3_or_out = E3L5 # E3L3_p0_out # E3L3_p2_out # E3L3_p3_out # E3L3_p4_out;
E3L3 = !b[1] $ E3L3_or_out;


--E3L6 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|sout_node[4]~37
E3L6 = EXP(b[3] & a[3]);


--E3L7 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|sout_node[4]~38
E3L7 = EXP(!a[3] & !b[3]);


--E3L8 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|sout_node[4]~39
E3L8_p1_out = E3L6 & E3L7;
E3L8_p0_out = b[0] & !a[1] & !a[0] & b[2];
E3L8_p2_out = !a[2] & b[0] & !a[1] & !a[0];
E3L8_p3_out = b[0] & !a[0] & b[1] & b[2];
E3L8_p4_out = !a[1] & b[1] & b[2];
E3L8_or_out = E3L9 # E3L8_p0_out # E3L8_p2_out # E3L8_p3_out # E3L8_p4_out;
E3L8 = E3L8_p1_out $ E3L8_or_out;


--A1L73 is Mux~1119
A1L73_p0_out = b[0] & b[1] & a[2] & !b[2] & !a[0] & !a[3] & !b[3];
A1L73_p1_out = !b[0] & !b[1] & a[2] & b[2] & a[0] & a[3] & b[3];
A1L73_p2_out = !b[0] & b[1] & !a[2] & a[0] & a[3] & b[3] & a[1];
A1L73_p3_out = !b[0] & b[1] & !a[2] & a[0] & !a[3] & !b[3] & a[1];
A1L73_p4_out = b[0] & b[1] & a[2] & !b[2] & !a[0] & a[3] & b[3];
A1L73_or_out = A1L73_p0_out # A1L73_p1_out # A1L73_p2_out # A1L73_p3_out # A1L73_p4_out;
A1L73 = A1L73_or_out;


--A1L83 is Mux~1125
A1L83_p0_out = b[0] & b[1] & a[2] & !a[0] & a[3] & b[3] & !a[1];
A1L83_p1_out = !b[0] & !b[1] & !a[2] & a[0] & a[3] & b[3] & !a[1];
A1L83_p2_out = !b[0] & !b[1] & !a[2] & a[0] & !a[3] & !b[3] & !a[1];
A1L83_p3_out = b[0] & !b[1] & !a[2] & !a[0] & a[3] & b[3] & a[1];
A1L83_p4_out = b[0] & !b[1] & !a[2] & !a[0] & !a[3] & !b[3] & a[1];
A1L83_or_out = A1L83_p0_out # A1L83_p1_out # A1L83_p2_out # A1L83_p3_out # A1L83_p4_out;
A1L83 = A1L83_or_out;


--A1L93 is Mux~1131
A1L93_p0_out = b[0] & a[2] & !b[2] & !a[0] & !a[3] & !b[3] & !a[1];
A1L93_p1_out = !b[0] & a[2] & b[2] & a[0] & a[3] & b[3] & a[1];
A1L93_p2_out = b[0] & a[2] & !a[0] & !a[3] & !b[3] & !a[1] & b[1];
A1L93_p3_out = b[0] & !b[2] & !a[0] & a[3] & b[3] & !a[1] & b[1];
A1L93_p4_out = b[0] & a[2] & !b[2] & !a[0] & a[3] & b[3] & !a[1];
A1L93_or_out = A1L93_p0_out # A1L93_p1_out # A1L93_p2_out # A1L93_p3_out # A1L93_p4_out;
A1L93 = A1L93_or_out;


--A1L04 is Mux~1137
A1L04_p0_out = !b[0] & b[1] & b[2] & a[0] & !a[3] & b[3] & !a[1];
A1L04_p1_out = b[0] & b[1] & !b[2] & !a[0] & !a[3] & !b[3] & !a[1];
A1L04_p2_out = !b[0] & !b[1] & !b[2] & a[0] & a[3] & b[3] & a[1];
A1L04_p3_out = !b[0] & !b[1] & !b[2] & a[0] & !a[3] & !b[3] & a[1];
A1L04_p4_out = !b[0] & b[1] & b[2] & a[0] & a[3] & !b[3] & !a[1];
A1L04_or_out = A1L04_p0_out # A1L04_p1_out # A1L04_p2_out # A1L04_p3_out # A1L04_p4_out;
A1L04 = A1L04_or_out;


--A1L14 is Mux~1143
A1L14_p0_out = b[0] & !b[1] & !a[2] & !a[0] & a[3] & !b[3] & !a[1];
A1L14_p1_out = !b[0] & b[1] & !a[2] & a[0] & a[3] & !b[3] & !a[1];
A1L14_p2_out = !b[0] & b[1] & !a[2] & a[0] & !a[3] & b[3] & !a[1];
A1L14_p3_out = b[0] & b[1] & !a[2] & !a[0] & a[3] & !b[3] & a[1];
A1L14_p4_out = b[0] & b[1] & !a[2] & !a[0] & !a[3] & b[3] & a[1];
A1L14_or_out = A1L14_p0_out # A1L14_p1_out # A1L14_p2_out # A1L14_p3_out # A1L14_p4_out;
A1L14 = A1L14_or_out;


--A1L24 is Mux~1149
A1L24_p0_out = b[0] & !b[1] & !a[0] & !a[3] & b[3] & !a[1] & !a[2];
A1L24_p1_out = b[0] & b[1] & b[2] & !a[0] & a[3] & !b[3] & a[1];
A1L24_p2_out = b[0] & b[1] & b[2] & !a[0] & !a[3] & b[3] & a[1];
A1L24_p3_out = b[0] & !b[1] & b[2] & !a[0] & a[3] & !b[3] & !a[1];
A1L24_p4_out = b[0] & !b[1] & b[2] & !a[0] & !a[3] & b[3] & !a[1];
A1L24_or_out = A1L24_p0_out # A1L24_p1_out # A1L24_p2_out # A1L24_p3_out # A1L24_p4_out;
A1L24 = A1L24_or_out;


--A1L34 is Mux~1155
A1L34_p0_out = b[1] & !a[2] & b[2] & !a[3] & b[3] & !a[1];
A1L34_p1_out = !b[1] & !a[2] & !b[2] & !a[3] & !b[3] & a[1];
A1L34_p2_out = b[1] & a[2] & !b[2] & !a[3] & !b[3] & !a[1];
A1L34_p3_out = !b[1] & !a[2] & !b[2] & a[3] & b[3] & a[1];
A1L34_p4_out = !b[1] & a[2] & b[2] & !a[3] & !b[3] & a[1];
A1L34_or_out = A1L34_p0_out # A1L34_p1_out # A1L34_p2_out # A1L34_p3_out # A1L34_p4_out;
A1L34 = A1L34_or_out;


--A1L54 is Mux~1159
A1L54_p1_out = A1L44 & !A1L73 & !A1L83 & !A1L93 & !A1L04 & !A1L14 & !A1L24 & !A1L34 & A1L92 & A1L03 & A1L13 & A1L23 & A1L33 & A1L43 & A1L53 & A1L63;
A1L54_or_out = A1L54_p1_out;
A1L54 = !(A1L54_or_out);


--A1L64 is Mux~1166
A1L64_p1_out = E3L1 & !E3L8 & E3L2 & E3L3;
A1L64_p2_out = !E3L1 & !E3L8 & E3L2 & !E3L3;
A1L64_p3_out = !E3L1 & E3L8 & E3L2 & E3L3;
A1L64_p4_out = !E3L1 & E3L8 & !E3L2 & !E3L3;
A1L64_or_out = A1L64_p1_out # A1L64_p2_out # A1L64_p3_out # A1L64_p4_out;
A1L64 = A1L64_or_out;


--A1L74 is Mux~1172
A1L74_p0_out = a[3] & b[3] & !b[1] & a[2] & !b[0] & a[0];
A1L74_p1_out = a[3] & !b[3] & a[1] & b[1] & !a[2] & b[2];
A1L74_p2_out = a[3] & b[3] & a[1] & b[1] & a[2] & !b[2];
A1L74_p3_out = a[3] & !b[3] & !a[2] & b[2] & !b[0] & a[0];
A1L74_p4_out = !a[3] & b[3] & !a[2] & b[2] & !b[0] & a[0];
A1L74_or_out = A1L08 # A1L74_p0_out # A1L74_p1_out # A1L74_p2_out # A1L74_p3_out # A1L74_p4_out;
A1L74 = A1L74_or_out;


--A1L84 is Mux~1178
A1L84_p0_out = b[0] & a[2] & !b[2] & !a[0] & !a[3] & !b[3];
A1L84_p1_out = !b[0] & a[1] & b[1] & !a[2] & !b[2] & a[0];
A1L84_p2_out = !b[0] & !a[1] & !b[1] & a[2] & b[2] & a[0];
A1L84_p3_out = !b[0] & !a[1] & !b[1] & !a[2] & !b[2] & a[0];
A1L84_p4_out = b[0] & a[2] & !b[2] & !a[0] & a[3] & b[3];
A1L84_or_out = A1L28 # A1L84_p0_out # A1L84_p1_out # A1L84_p2_out # A1L84_p3_out # A1L84_p4_out;
A1L84 = A1L84_or_out;


--A1L94 is Mux~1179
A1L94 = EXP(b[0] & a[1] & !b[1] & a[2] & b[2] & !a[0]);


--A1L05 is Mux~1180
A1L05 = EXP(b[0] & a[1] & !b[1] & !a[2] & !b[2] & !a[0]);


--A1L15 is Mux~1181
A1L15 = EXP(b[0] & !a[1] & b[1] & a[2] & !b[2] & !a[0]);


--A1L25 is Mux~1182
A1L25 = EXP(b[0] & !a[1] & b[1] & !a[2] & b[2] & !a[0]);


--A1L35 is Mux~1183
A1L35_p1_out = A1L94 & A1L05 & A1L15 & A1L25 & !A1L74 & !A1L84;
A1L35_or_out = A1L35_p1_out;
A1L35 = !(A1L35_or_out);


--A1L45 is Mux~1191
A1L45_p0_out = b[0] & a[1] & b[1] & a[3] & b[3] & !a[0];
A1L45_p1_out = !b[0] & a[1] & !b[1] & !a[2] & !a[3] & !b[3];
A1L45_p2_out = !b[0] & !a[1] & !b[1] & !a[2] & !a[3] & b[3];
A1L45_p3_out = b[0] & a[1] & b[1] & !a[3] & !b[3] & !a[0];
A1L45_p4_out = b[0] & !a[1] & !b[1] & a[3] & b[3] & !a[0];
A1L45_or_out = A1L38 # A1L45_p0_out # A1L45_p1_out # A1L45_p2_out # A1L45_p3_out # A1L45_p4_out;
A1L45 = A1L45_or_out;


--A1L55 is Mux~1197
A1L55_p0_out = !b[0] & a[1] & !b[1] & !a[2] & !b[2];
A1L55_p1_out = !b[0] & a[1] & !b[1] & !a[2] & a[3] & b[3];
A1L55_p2_out = !b[0] & a[1] & b[1] & !a[3] & b[3] & b[2];
A1L55_p3_out = !b[0] & a[1] & b[1] & a[3] & !b[3] & b[2];
A1L55_p4_out = !b[0] & a[1] & !b[1] & a[2] & b[2];
A1L55_or_out = A1L48 # A1L55_p0_out # A1L55_p1_out # A1L55_p2_out # A1L55_p3_out # A1L55_p4_out;
A1L55 = A1L55_or_out;


--A1L65 is Mux~1203
A1L65_p0_out = b[0] & a[0] & a[2] & a[3] & b[3] & !b[2];
A1L65_p1_out = b[0] & a[0] & !a[2] & a[3] & !b[3];
A1L65_p2_out = !b[0] & !a[0] & a[2] & !a[3] & !b[3] & !b[2];
A1L65_p3_out = !b[0] & !a[0] & a[2] & a[3] & b[3] & !b[2];
A1L65_p4_out = b[0] & a[0] & a[2] & !a[3] & !b[3] & !b[2];
A1L65_or_out = A1L58 # A1L65_p0_out # A1L65_p1_out # A1L65_p2_out # A1L65_p3_out # A1L65_p4_out;
A1L65 = A1L65_or_out;


--A1L75 is Mux~1209
A1L75_p0_out = !b[0] & a[0] & !b[2] & !a[3] & b[3] & a[1];
A1L75_p1_out = b[0] & a[0] & b[2] & a[3] & !b[3];
A1L75_p2_out = !a[0] & !b[2] & a[3] & !b[3] & !a[1] & b[1];
A1L75_p3_out = !a[0] & !b[2] & !a[3] & b[3] & !a[1] & b[1];
A1L75_p4_out = !b[0] & a[0] & !b[2] & a[3] & !b[3] & a[1];
A1L75_or_out = A1L68 # A1L75_p0_out # A1L75_p1_out # A1L75_p2_out # A1L75_p3_out # A1L75_p4_out;
A1L75 = A1L75_or_out;


--A1L85 is Mux~1215
A1L85_p0_out = b[0] & !a[0] & !a[2] & b[2] & !b[1];
A1L85_p1_out = !b[0] & a[0] & !a[1] & !a[2] & b[2];
A1L85_p2_out = b[0] & !a[0] & a[1] & a[2] & !b[2];
A1L85_p3_out = b[0] & !a[0] & a[1] & !a[2] & b[2];
A1L85_p4_out = b[0] & !a[0] & a[2] & !b[2] & !b[1];
A1L85_or_out = A1L78 # A1L85_p0_out # A1L85_p1_out # A1L85_p2_out # A1L85_p3_out # A1L85_p4_out;
A1L85 = A1L85_or_out;


--A1L95 is Mux~1216
A1L95_p1_out = !A1L45 & !A1L55 & !A1L65 & !A1L75 & !A1L85;
A1L95_or_out = A1L95_p1_out;
A1L95 = A1L95_or_out;


--A1L06 is Mux~1223
A1L06_p0_out = !a[0] & b[1] & a[1] & a[2] & !b[2] & !a[3] & !b[3] & !b[0];
A1L06_p1_out = a[0] & !b[1] & !a[1] & a[2] & !b[2] & !a[3] & !b[3] & b[0];
A1L06_p2_out = a[0] & !b[1] & !a[1] & !a[2] & b[2] & a[3] & !b[3] & b[0];
A1L06_p3_out = a[0] & !b[1] & !a[1] & !a[2] & b[2] & !a[3] & b[3] & b[0];
A1L06_p4_out = !a[0] & b[1] & a[1] & a[2] & !b[2] & a[3] & b[3] & !b[0];
A1L06_or_out = A1L88 # A1L06_p0_out # A1L06_p1_out # A1L06_p2_out # A1L06_p3_out # A1L06_p4_out;
A1L06 = A1L06_or_out;


--A1L16 is Mux~1229
A1L16_p0_out = b[1] & !a[1] & a[2] & !b[2] & !a[3] & b[3] & b[0];
A1L16_p1_out = !a[0] & !b[1] & !a[1] & !a[2] & b[2] & !a[3] & b[3] & !b[0];
A1L16_p2_out = !a[0] & b[1] & !a[1] & a[2] & !b[2] & a[3] & !b[3];
A1L16_p3_out = b[1] & !a[1] & a[2] & !b[2] & a[3] & !b[3] & b[0];
A1L16_p4_out = !a[0] & b[1] & !a[1] & a[2] & !b[2] & !a[3] & b[3];
A1L16_or_out = A1L98 # A1L16_p0_out # A1L16_p1_out # A1L16_p2_out # A1L16_p3_out # A1L16_p4_out;
A1L16 = A1L16_or_out;


--A1L26 is Mux~1235
A1L26_p0_out = !b[1] & a[1] & !a[2] & !b[2] & !a[3] & b[3] & !a[0];
A1L26_p1_out = !b[1] & a[1] & a[2] & b[2] & a[3] & !b[3] & b[0];
A1L26_p2_out = !b[1] & a[1] & a[2] & b[2] & !a[3] & b[3] & !a[0];
A1L26_p3_out = !b[1] & a[1] & a[2] & b[2] & !a[3] & b[3] & b[0];
A1L26_p4_out = !b[1] & a[1] & !a[2] & !b[2] & a[3] & !b[3] & !a[0];
A1L26_or_out = A1L09 # A1L26_p0_out # A1L26_p1_out # A1L26_p2_out # A1L26_p3_out # A1L26_p4_out;
A1L26 = A1L26_or_out;


--A1L36 is Mux~1241
A1L36_p0_out = !b[1] & a[1] & !a[2] & !b[2] & b[0] & !a[3] & b[3];
A1L36_p1_out = !a[0] & b[1] & !a[1] & a[2] & !b[2] & b[0];
A1L36_p2_out = a[0] & !b[1] & a[1] & a[2] & !b[2] & !b[0];
A1L36_p3_out = a[0] & !b[1] & a[1] & !a[2] & b[2] & !b[0];
A1L36_p4_out = !b[1] & a[1] & !a[2] & !b[2] & b[0] & a[3] & !b[3];
A1L36_or_out = A1L19 # A1L36_p0_out # A1L36_p1_out # A1L36_p2_out # A1L36_p3_out # A1L36_p4_out;
A1L36 = A1L36_or_out;


--A1L46 is Mux~1242
A1L46 = EXP(a[0] & b[1] & a[2] & b[2] & !b[0]);


--A1L56 is Mux~1243
A1L56 = EXP(a[0] & b[1] & !a[2] & !b[2] & !b[0]);


--A1L66 is Mux~1244
A1L66 = EXP(a[0] & !a[1] & a[2] & b[2] & !b[0]);


--A1L76 is Mux~1245
A1L76 = EXP(a[0] & !a[1] & !a[2] & !b[2] & !b[0]);


--A1L86 is Mux~1246
A1L86_p1_out = A1L46 & A1L56 & A1L66 & A1L76 & !A1L06 & !A1L16 & !A1L26 & !A1L36;
A1L86_or_out = A1L86_p1_out;
A1L86 = !(A1L86_or_out);


--A1L96 is Mux~1253
A1L96_p1_out = E3L3 & E3L1 & !E3L2;
A1L96_p2_out = E3L3 & E3L1 & E3L8;
A1L96_p3_out = E3L3 & !E3L1 & E3L2 & !E3L8;
A1L96_p4_out = !E3L1 & !E3L2 & E3L8;
A1L96_or_out = A1L96_p1_out # A1L96_p2_out # A1L96_p3_out # A1L96_p4_out;
A1L96 = A1L96_or_out;


--A1L17 is Mux~1265
A1L17_p0_out = !b[2] & a[2] & !a[0] & b[0];
A1L17_p1_out = b[2] & b[1] & !a[2] & a[0] & !b[0];
A1L17_p2_out = !b[2] & !b[1] & !a[2] & a[0] & !b[0];
A1L17_p3_out = !b[2] & b[1] & a[2] & a[0] & !b[0];
A1L17_p4_out = b[2] & !b[1] & a[2] & a[0] & !b[0];
A1L17_or_out = A1L17_p0_out # A1L17_p1_out # A1L17_p2_out # A1L17_p3_out # A1L17_p4_out;
A1L17 = A1L17_or_out;


--A1L27 is Mux~1271
A1L27_p0_out = !b[2] & b[1] & a[1] & !a[2] & a[0];
A1L27_p1_out = !b[2] & !b[1] & !a[1] & !a[2] & a[0];
A1L27_p2_out = !b[2] & !b[1] & !a[1] & !a[2] & !b[0];
A1L27_p3_out = b[2] & b[1] & a[1] & a[2] & a[0];
A1L27_p4_out = b[2] & !b[1] & !a[1] & a[2] & a[0];
A1L27_or_out = A1L27_p0_out # A1L27_p1_out # A1L27_p2_out # A1L27_p3_out # A1L27_p4_out;
A1L27 = A1L27_or_out;


--A1L37 is Mux~1277
A1L37_p0_out = b[1] & a[1] & !b[0] & b[2] & a[2];
A1L37_p1_out = !b[1] & !a[1] & a[0] & !b[0];
A1L37_p2_out = b[1] & a[1] & a[0] & !b[0];
A1L37_p3_out = b[1] & a[1] & !b[0] & !b[2] & !a[2];
A1L37_p4_out = !b[1] & !a[1] & !b[0] & b[2] & a[2];
A1L37_or_out = A1L37_p0_out # A1L37_p1_out # A1L37_p2_out # A1L37_p3_out # A1L37_p4_out;
A1L37 = A1L37_or_out;


--A1L47 is Mux~1283
A1L47_p0_out = b[2] & a[1] & b[3] & !a[3];
A1L47_p1_out = b[2] & a[1] & !b[3] & a[3];
A1L47_p2_out = !b[2] & a[1] & b[3] & a[3] & a[2];
A1L47_p3_out = b[2] & !b[3] & a[3] & a[2];
A1L47_p4_out = !b[2] & !b[3] & a[3] & !a[2];
A1L47_or_out = A1L47_p0_out # A1L47_p1_out # A1L47_p2_out # A1L47_p3_out # A1L47_p4_out;
A1L47 = A1L47_or_out;


--A1L57 is Mux~1289
A1L57_p0_out = b[2] & b[3] & !a[3] & a[2];
A1L57_p1_out = b[2] & !b[1] & !b[3] & a[3];
A1L57_p2_out = !b[2] & b[1] & !b[3] & a[3] & !a[1];
A1L57_p3_out = b[2] & !b[1] & b[3] & !a[3];
A1L57_p4_out = !b[2] & b[1] & b[3] & !a[3] & !a[1];
A1L57_or_out = A1L57_p0_out # A1L57_p1_out # A1L57_p2_out # A1L57_p3_out # A1L57_p4_out;
A1L57 = A1L57_or_out;


--A1L87 is Mux~1296
A1L87_p1_out = A1L67 & A1L77 & !A1L17 & !A1L27 & !A1L37 & !A1L47 & !A1L57 & A1L07;
A1L87_or_out = A1L87_p1_out;
A1L87 = A1L87_or_out;


--E3L4 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|sout_node[3]~46
E3L4_p0_out = !b[0] & a[1] & !b[2] & a[2] & b[1];
E3L4_p1_out = !b[0] & !a[1] & !b[2] & !a[2];
E3L4_p2_out = !a[1] & !b[2] & !a[2] & a[0];
E3L4_p3_out = !b[0] & !a[1] & b[2] & a[2];
E3L4_p4_out = !a[1] & b[2] & a[2] & a[0];
E3L4 = E3L4_p0_out # E3L4_p1_out # E3L4_p2_out # E3L4_p3_out # E3L4_p4_out;


--E3L5 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|sout_node[3]~52
E3L5_p0_out = b[0] & !b[2] & !a[2] & b[1] & !a[0];
E3L5_p1_out = !b[0] & a[1] & b[2] & !a[2] & b[1];
E3L5_p2_out = a[1] & !b[2] & a[2] & b[1] & a[0];
E3L5_p3_out = a[1] & b[2] & !a[2] & b[1] & a[0];
E3L5_p4_out = b[0] & b[2] & a[2] & b[1] & !a[0];
E3L5 = E3L4 # E3L5_p0_out # E3L5_p1_out # E3L5_p2_out # E3L5_p3_out # E3L5_p4_out;