intbvd1.c

PXA27X_CAYMAN BSP from CAYMAN board

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/*++

Module Name:  $Workfile: intbvd1.c $

Abstract:  
 Intel XScale Microarchitecture platform interrupt service routine
 for the Bulverde Mainstone plaform.

Notes:

Created: March 25, 2002

--*/


#include <windows.h>
#include <bldver.h>
#include <nkintr.h>
#include <oalintr.h>

#include "bvd1.h"
#include "bvd1BD.h"
#include "ISRDefs.h"

extern ReadICHP(void);

extern void WatchdogReset();
extern BOOL bWarmStart;


//
// Array of ISR functions
//

pFunc pIRQISR[MaxNumISRs] = 
{ 
    NoDefinedISR,             // SSP3 - ID 0
    NoDefinedISR,             // Baseband - 1
    USBNONOHCIISR,            // USB Host Event - 2
    USBOHCIISR,               // OHCI - 3
    KEYPADISR,                // Keypad - 4
    NoDefinedISR,             // MEMstick - 5
    NoDefinedISR,             // Power I2C - 6
    OSTM4_11TimerISR,         // M4-M11 Timers - 7
    GPIO0ISR,                 // GPIO0 - 8
    GPIO1ISR,                 // GPIO1 edge detect - 9
    GPIOxISR,                 // GPIOxx_2	- 10
    UDCISR,                   // USB Client - 11
    PMUISR,                   // PMU - 12
    NoDefinedISR,             // I2S - 13
    NoDefinedISR,             // AC97 - UCB1400
    NoDefinedISR,             // USIM - 15
    NoDefinedISR,             // SSP2 - 16
    LCDISR,                   // LCD controller - 17
    NoDefinedISR,             // I2C - 18
    NoDefinedISR,             // ICP - 19
    STDUARTISR,               // STD UART - 20
    BTUARTISR,                // BTUART - 21
    FFUARTISR,                // FFUART - 22
    MMCISR,                   // MMC - 23
    NoDefinedISR,             // SSP1 - 24
    DMACISR,                  // DMAC - 25
    OSTM0TimerISR,            // M0 - Scheduler - 26
    OSTM1TimerISR,            // M1 - Touch Timer - 27
    OSTM2TimerISR,            // M2 - Profiler - 28
    OSTM3TimerISR,            // M3 - 29
    NoDefinedISR,             // Hz Tick - 30
    RTCAlarmISR,              // RTC Alarm - 31
	NoDefinedISR,             // Trusted Platform Module
    BvdCIISR				  // Bulverde Capture Interface
};


//
// OEMInterruptHandler
//
// IRQ interrupt routine.
//
// Read the IHCP register to get the highest priority
// interrupting device.
//
// Vector to the specific ISR routine.
//
//  Inputs:
//      ra  -   return address of the interrupted routine
//
int OEMInterruptHandler(unsigned int ra)
{
    unsigned long   devID, ichp;
   	volatile XLLP_INTC_T *v_pICReg;

    if(bWarmStart)
    {
	    WatchdogReset();
    }

	v_pICReg = (volatile XLLP_INTC_T *)INTC_BASE_U_VIRTUAL;

   	ichp = v_pICReg->ichp;

    devID = (ichp >> 16) & 0x0000003F;

    return(*pIRQISR[devID])(ra);

}

//
// Fast Interrupts - FIQs
//
// PMU may be our only FIQ interrupt.
//
void OEMInterruptHandlerFIQ(void)
{
}


//
// NoDefinedISR 
//
// We get here on an undefined interrupt - the interrupt for
// the device is enabled, but no ISR defined.
//
static int NoDefinedISR (unsigned int ra)
{
    return SYSINTR_NOP;
}