📄 fwbvd1.s
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nop
HANG
b HANG
ENDIF ; // if :DEF: ETHBOOT
; *********************************************************************************
; SubRoutines
; *********************************************************************************
; void Launch(unsigned long pFunc)
;
; Routine Description:
;
; This function launches the program at pFunc. The expectation is that
; the launched program never returns. We disable the MMU right
; before we jump to [r0].
;
; Arguments:
;
; pFunc (r0) - Supplies the Virtual, Cached address of the program to launch.
;
; Return Value:
;
; None; the launched program never returns.
;
; Called From:
;
; Main.c::main()
;
; PreConditions:
;
; It is assumed that the MMU and Caches are ON upon entry
;
LEAF_ENTRY Launch
ldr r2, =PhysicalStart ; *This is the Relative Virtual Address (RVA). It is simply an offset.
;
; First, we need to find the Offset that will get us from Virtual->Physical for
; the EBOOT Partition
;
ldr r3, =(EBOOT_PARTITION_PHY_BASE - SDRAM_VIR_C_EBOOT_PARTITION)
;
; Next, we add the above found Offset to PhysicalStart's RVA.
; (R2 now points to the Physical address of PhysicalStart (below).)
;
add r2, r2, r3
;
; Now, we calculate the Offset that will get us from Virtual->Physical for
; the WinCE Partition
;
ldr r3, =(SDRAM_PHY_WINCE_PARTITION - SDRAM_VIR_C_WINCE_PARTITION)
;
; ...then add the above Offset to the Virtual/Cached Address passed to us in R0
;
add r0, r0, r3 ; r0 = (Virtual Address of Program to Launch) + Virtual->Physical Offset
mov r3, r0 ; bman
; Support soft reset with Eboot running as boot code.
ldr r4, =(RESET_LAUNCH_ADDR_PHYSICAL) ; get pointer to SLEEPDATA
;
; Next, we disable the MMU, I&D Caches.
;
mov r1, #0x0078
mcr p15, 0, r1, c1, c0, 0
mov r1, #0 ; Clear out soft reset indicator register to avoid aliasing in launched program
str r3, [r4] ; Store launch address for soft reset use
IF Interworking :LOR: Thumbing
bx r2
ELSE
mov pc, r2
ENDIF
nop ; These NOPs are used to flush the Pipeline
nop
nop
nop
PhysicalStart
mcr p15, 0, r2, c8, c7, 0 ; Flush the I&D TLBs
ldr r0, =OEMAddressTable
; Jump to program we are launching!! No return.
;
IF Interworking :LOR: Thumbing
bx r3
ELSE
mov pc, r3
ENDIF
; ----------------------
; void Launch2(unsigned long pFunc)
;
; Routine Description:
;
; This function launches the program at pFunc. The expectation is that
; the launched program never returns. We disable the MMU right
; before we jump to [r0].
;
; Arguments:
;
; pFunc (r0) - Supplies the Physical Address of the program to launch.
;
; Return Value:
;
; None; the launched program never returns.
;
; Called From:
;
; Main.c::main()
;
; PreConditions:
;
; It is assumed that the MMU and Caches are ON upon entry
;
LEAF_ENTRY Launch2
ldr r2, =PhysicalStart2 ; *This is the Relative Virtual Address (RVA). It is simply an offset.
;
; First, we need to find the Offset that will get us from Virtual->Phyiscal for
; the EBOOT Partition
;
ldr r3, =(EBOOT_PARTITION_PHY_BASE - SDRAM_VIR_C_EBOOT_PARTITION)
;
; Next, we add the above found Offset to PhysicalStart's RVA.
; (R2 now points to the Physical address of PhysicalStart (below).)
;
add r2, r2, r3
;
; Now, we calculate the Offset that will get us from Virtual->Physical for
; the WinCE Partition
;
ldr r3, =(SDRAM_PHY_WINCE_PARTITION - SDRAM_VIR_C_WINCE_PARTITION)
;
; ...then add the above Offset to the Virtual/Cached Address passed to us in R0
;
;add r0, r0, r3 ; r0 = (Virtual Address of Program to Launch) + Virtual->Physical Offset
; Support soft reset with Eboot running as boot code.
ldr r4, =(RESET_LAUNCH_ADDR_PHYSICAL) ; get pointer to SLEEPDATA
;cjw Does this count for Soft Reset???
;
; Next, we disable the MMU, I&D Caches and the Write Buffer.
;
mov r1, #0x0078
mcr p15, 0, r1, c1, c0, 0
str r0, [r4] ; Store launch address for soft reset use
mov r1, #0 ; Clear out soft reset indicator register to avoid aliasing in launched program
mov pc, r2 ; Jump to PhysicalStart
nop ; These NOPs are used to flush the Pipeline
nop
nop
nop
PhysicalStart2
mov r2, #0
mcr p15, 0, r2, c8, c7, 0 ; Flush the I&D TLBs
mov pc, r0 ; Jump to program we are launching!! No return.
; void WatchdogReset
;
; Return Value:
;
ALIGN
WatchdogResetLabel DCB 0xA, 0xD, 0xA, 0xD, "Now in WatchdogReset....", 0xA, 0xD, 0
LEAF_ENTRY WatchdogReset
;ldr r1, =FFUART_BASE_U_VIRTUAL
ldr r1, =BTUART_BASE_U_VIRTUAL
add r2, pc, #WatchdogResetLabel-(.+8)
PrintStr r1, r2, r3
ldr r1,=OST_BASE_U_VIRTUAL
ldr r2, [r1,#OSCR0_OFFSET]
ldr r3, =325000
add r2, r2, r3 ; 1 sec
str r2, [r1,#OSMR3_OFFSET]
;;;;here stor SleepType of SoftReset to the memory.
;ldr r1, =SLEEP_TYPE_SOFT_RESET
;ldr r3, =MEM_BASE_U_VIRTUAL
;ldr r2,=SLEEP_SAVE_OFFSET;
;add r3, r3, r2;
;ldr r2,=SLEEP_TYPE_OFFSET;
;add r3, r3, r2;
;str r1, [r3]
;;;;;
ldr r1,=OST_BASE_U_VIRTUAL
ldr r2,=0x00000001
str r2, [r1,#OWER_OFFSET]
;loop for watchdog reset.
loopp NOP
B loopp
LTORG
ALIGN
shining
ldr r1, =GPIO_BASE_PHYSICAL; GPIO_BASE_PHYSICAL ;GPIO_BASE_U_VIRTUAL
; Next, Set GPDR accordingly for all pins
;
ldr r2, =0x00600000
str r2, [r1, #GPDR3_OFFSET]
; Finally, set GAFR0,1,2,3 for alternate functions
;
ldr r2, =0x00000000
str r2, [r1, #GAFR3_U_OFFSET]
__loop
ldr r11, =GPIO_BASE_PHYSICAL ;GPIO_BASE_PHYSICAL
ldr r2, =0x00400000
str r2, [r11, #GPSR3_OFFSET]
ldr r2, =0x00200000
str r2, [r11, #GPCR3_OFFSET]
LDR R3, =0xA00000
delay1 NOP
NOP
NOP
SUBS R3, R3,#1
BNE delay1
ldr r2, =0x00200000
str r2, [r11, #GPSR3_OFFSET]
ldr r2, =0x00400000
str r2, [r11, #GPCR3_OFFSET]
LDR R3, =0xA00000
delay2 NOP
NOP
NOP
SUBS R3, R3,#1
BNE delay2 ; ----------------------
B __loop
;;;;;;;;;;;;;;;;;;;;;;
PHY_ADDR EQU 1
ALIGN
_LightUp
IF :DEF: PHY_ADDR
ldr r11, =GPIO_BASE_PHYSICAL
ELSE
ldr r11, =GPIO_BASE_U_VIRTUAL
ENDIF
ldr r2, =0x00000080
str r2, [r11, #GPSR1_OFFSET]
LDR R3, =0xA00000
delay3 NOP
NOP
NOP
SUBS R3, R3,#1
BNE delay3
ldr r2, =0x00000080
str r2, [r11, #GPCR1_OFFSET]
LDR R3, =0xA00000
delay4 NOP
NOP
NOP
SUBS R3, R3,#1
BNE delay4 ;
; B _LightUp
mov pc, lr
ALIGN
_LightUpseg7
IF :DEF: PHY_ADDR
ldr r11, =SEGMENT7_BASE_PHYSICAL
ELSE
ldr r11, =SEGMENT7_BASE_U_VIRTUAL
ENDIF
ldr r2, =0x00FF
str r2, [r11]
LDR R3, =0xA00000
delay3seg7
NOP
NOP
NOP
SUBS R3, R3,#1
BNE delay3seg7
ldr r2, =0xFF00
str r2, [r11]
LDR R3, =0xA00000
delay4seg7
NOP
NOP
NOP
SUBS R3, R3,#1
BNE delay4seg7
; B _LightUpseg7
mov pc, lr
ledflash
ldr r1, =GPIO_BASE_PHYSICAL
ldr r2, [r1, #GPDR3_OFFSET]
orr r2,r2,#0xc0000
str r2, [r1, #GPDR3_OFFSET]
ldr r2, [r1, #GAFR3_U_OFFSET]
ldr r0,=0xfff0f
and r2,r2,r0
str r2, [r1, #GAFR3_U_OFFSET]
loop3
ldr r2, [r1, #GPSR3_OFFSET]
orr r2,r2,#0xc0000
str r2, [r1, #GPSR3_OFFSET]
ldr r0,=0xffffff
loop1
subs r0,r0,#1
bne loop1
ldr r2, [r1, #GPCR3_OFFSET]
orr r2,r2,#0xc0000
str r2, [r1, #GPCR3_OFFSET]
ldr r0,=0xffffff
loop2
subs r0,r0,#1
bne loop2
b loop3
mov pc, lr
END
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