📄 fwbvd1.s
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; ****************************************************************************
; Scrub SDRAM iff Hard-Reset.
;
; 64MB: Bulverde
;
tst r10, #RCSR_GPIO_RESET ; skip RAM scrub after GPIO reset
bne showGot_SOFT_RESET ; but announce we got a soft reset
tst r10, #xlli_RCSR_SMR ; Skip scrub after sleep,
bne END_DISPLAY ; need RAM contents
add r2, pc, #START_SCRUBBING-(.+8)
ldr r1, =BTUART_BASE_PHYSICAL ; Tx start
PrintStr r1, r2, r3
SCRUB_SDRAM_TUNED_64 r1, r2, r3, r4, r5, r6 ; hardcoded for 64MB scrub
add r2, pc, #END_SCRUBBING-(.+8)
ldr r1, =BTUART_BASE_PHYSICAL ; Tx end
PrintStr r1, r2, r3
b END_DISPLAY
showGot_SOFT_RESET
ldr r1, =BTUART_BASE_PHYSICAL
ldr r2, =(SOFT_RST_STR-(.+8))
add r2, pc, r2 ;
PrintStr r1, r2, r3
b END_DISPLAY
END_DISPLAY
mov pc, lr
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;; Data used for FFUART Transmissions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; Misc. Strings
;
ALIGN
SOFT_RST_STR DCB 0xD, 0xA, " Got Soft Reset", 0xD, 0xA, 0
ALIGN
START_SCRUBBING DCB 0xD, 0xA, "Beginning SDRAM Scrub...", 0xD, 0xA, 0
ALIGN
END_SCRUBBING DCB "SDRAM Scrub Complete", 0xD, 0xA, 0
CR_LF DCB 0xD, 0xA, 0
ALIGN
VERIFY_FAILURE_MSG DCB 0xD, 0xA, 0xD, 0xA, "**FLASH to SDRAM verification failed at SDRAM address on HEX LEDs. Halting.**", 0xD, 0xA, 0
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
ALIGN
INITMMU
; *****************************************************************
; Load RVA of OEMAddressTable[]
;
add r0, pc, #OEMAddressTable-(.+8) ; (r0) = OEMAddressTable phys addr *DO NOT DESTROY THIS VALUE
mov r11, r0 ; (r11) = &MemoryMap (save pointer for later)
IF :LNOT: :DEF: ETHBOOT
bl KernelStart ; Branch to coreos\armtrap.s::KernelStart()
; should not return, NK now in control
nop
nop
nop
DEADLOOP
b DEADLOOP
ENDIF
; For GPIO / soft reset, don't go to Eboot main(), go to launch address from load.
tst r10, #RCSR_GPIO_RESET
;;tst r10, #0x2
beq CONTINUE
; Get previously saved launch address
ldr r4, =(RESET_LAUNCH_ADDR_PHYSICAL) ; pointer
ldr r3, [r4] ; launch address
ldr r2, =PhysicalStart
;
; First, we need to find the Offset that will get us from Virtual->Physical for
; the EBOOT Partition
;
ldr r5, =(EBOOT_PARTITION_PHY_BASE - SDRAM_VIR_C_EBOOT_PARTITION)
;
; Next, we add the above found Offset to PhysicalStart's RVA.
; (R2 now points to the Physical address of PhysicalStart (below).)
;
add r2, r2, r5
mov r1, r10 ; Contains soft reset indicators.
; ldr r0, =(FPGA_REGS_BASE_PHYSICAL+LEDDAT1_OFFSET)
IF Interworking :LOR: Thumbing
bx r2
ELSE
mov pc, r2
ENDIF
nop ; These NOPs are used to flush the Pipeline
nop
nop
nop
nop
nop
nop
nop
b CONTINUE ; branch around Include (do not move)
INCLUDE MemMap.inc ; **NOTE: DO NOT move this! Must be in this section
CONTINUE
; *****************************************************************
; Copy Flash-based Eboot image into RAM. This will be placed
; in our EBOOT_PARTITION plus an offset. (EbootOffset)
;
;
; The bootloader is linked to run from RAM but is initially installed in "FLASH" Ram
; at the reset/boot address. Now that memory has been configured, copy the
; entire bootloader image to RAM.
;
; *Note: The bootloader's region size must agree with boot.bib's declaration of
; it.
;
ldr r8, =BOOT_FLASH_BASE_PHYSICAL ; Phy Base of our EBOOT PARTITION
ldr r1, =(EBOOT_PARTITION_PHY_BASE + EbootOffset) ; **Defined in BOOT.BIB. Is the offset into the EBOOT PARTITION.
; This (and next) values must match BOOT.BIB!
ldr r2, =(EBootImageLen/16) ; Setup Loop control. We are block-copying 16-bytes per iteration.
; **EBootImageLen From BOOT.BIB, size field.
;
; Do 4x32-bit Block Copies from Flash->SDRAM (corrupts r4-r7)
;
10 ldmia r8!, {r4-r7} ; Loads from BOOT_FLASH_BASE_PHYSICAL, post increment
stmia r1!, {r4-r7} ; Stores to (EBOOT_PARTITION_PHY_BASE+EbootOffset), post increment
subs r2, r2, #1
bne %B10
;;;;;;;;;;; BMAN: check the contents of RAM while we are still in flash ;;;;;;;;;;;;;;;;;;
ldr r0, =EBootImageLen ; 0x2000
ldr r1, =(EBOOT_PARTITION_PHY_BASE + EbootOffset) ; SDRAM start Adx
ldr r2, =BOOT_FLASH_BASE_PHYSICAL ; FLASH start Adx
VERIFY
ldr r3, [r1], #4 ; read word from SDRAM
ldr r4, [r2], #4 ; read word from FLASH
cmp r3, r4 ; and compare them
bne VERIFY_FAILURE ; if not the same, quit!
subs r0, r0, #4
bne VERIFY
b VDONE
VERIFY_FAILURE
add r2, pc, #VERIFY_FAILURE_MSG-(.+8)
ldr r1, =BTUART_BASE_PHYSICAL ; Tx end
PrintStr r1, r2, r3
STALL
b STALL
VDONE
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; Now that we have copied ourselves into RAM, jump to RAM's 'CodeInRAM' Label and start there
;
add r2, pc, #CodeInRAM-(.+8) ; Calc. PC-relative address of 'CodeInRAM'
ldr r1, =(EBOOT_PARTITION_PHY_BASE + EbootOffset) ; Load Phy Adx of where we started our copy above
add r1, r1, r2 ; Calc. Phy Adx of 'CodeInRAM' tag
IF Interworking :LOR: Thumbing
bx r1
ELSE
mov pc, r1
ENDIF
nop
nop
nop
CodeInRAM
BUILDTTB
; *****************************************************************
; *****************************************************************
; *****************************************************************
; *****************************************************************
; *****************************************************************
; Fill in first-level Section descriptors to create 1MB mapped regions
; from the contents of the MemoryMap array. (OEMAddressTable[])
;
; (r9) = TTB
; (r11) = ptr to MemoryMap array
;
;
; We split the mappings: [8000 0000 --> 9FFF FFFF] = Cacheable, Bufferable
; [A000 0000 --> BFFF FFFF] = NonCacheable, nonBufferable
;
;;;;; **************************************
; All code below is EBOOT-specific
; (i.e. NOT used by winCE itself)
; **************************************
;
; Set TTB
;
ldr r9, =EBOOT_PARTITION_PHY_BASE ; (r9) = physical address of 1st level table (EBOOT partition base) 0xA000 0000
ldr r0, =0xFFFFC000
and r9, r9, r0 ; mask off TTB[31:0] (must be 0's)
mcr p15, 0, r9, c2, c0, 0 ; set TTB
; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
; ~~~~~~~~~~ MAP CACHEABLE. BUFFERABLE SECTION DESCRIPTORS ~~~~~~~~~~~~~~~~
; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
mov r0, #0x0E ; (r0) = Section (1MB) Descriptor; C=B=1. Write-Back, Read-Allocate
orr r0, r0, #0x400 ; set AP
20 mov r1, r11 ; (r1) = ptr to MemoryMap array
;
; Start Crunching through the OEMAddressTable[]
;
; r2 temporarily holds OEMAddressTable[VA]
; r3 temporarily holds OEMAddressTable[PHY]
; r4 temporarily holds OEMAddressTable[#MB]
;
25
ldr r2, [r1], #4 ; (r2) = virtual, Cached address to map Bank at
ldr r3, [r1], #4 ; (r3) = physical address to map from
ldr r4, [r1], #4 ; (r4) = num MB to map
cmp r4, #0 ; End of table?
beq %F29
;****************************************************************************************************************************************************************
; (r2) holds the &descriptor
; (r0) holds the actual section descriptor
;
; Create Descriptor Address
;
ldr r6, =0xFFF00000
and r2, r2, r6 ; only VA[31:20] are valid
orr r2, r9, r2, LSR #18 ; build the descriptor address: r2 = (TTB[31:14} | VA[31:20] >> 18)
; Create the Descriptor
;
ldr r6, =0xFFF00000
and r3, r3, r6 ; only PA[31:20] are valid for the descriptor; rest will be static
orr r0, r3, r0 ; build the descriptor: r0 = (PA[31:20] | the rest of the descriptor)
; Store the descriptor at the proper (phy) address
;
28 str r0, [r2], #4
add r0, r0, #0x00100000 ; (r0) = THE Section descriptor for the next 1MB mapping (just add 1MB)
sub r4, r4, #1 ; Decrement number of MB left
cmp r4, #0
bne %B28 ; Map next MB
bic r0, r0, #0xF0000000 ; Clear Section Base Address Field
bic r0, r0, #0x0FF00000 ; Clear Section Base Address Field
b %B25 ; Get and process next table element
; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
;
; Next, go through the above loop construct again.
; This time, we will map C=B=0 space (i.e. uncached, nonbuffered)
;
29
tst r0, #8 ; Test for 'C' bit set (means we just used above loop structure to map Cacheable,Bufferable space)
bic r0, r0, #0x0C ; clear cachable & bufferable bits in Descriptor (clear C&B bits)
add r9, r9, #0x0800 ; (r9) = ptr to 1st PTE for "unmapped uncached space" (0x2000 0000 + V_U_Adx)
bne %B20 ; go setup Descriptors for uncached space (map C=B=0 space)
ACTIVATEMMU
; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
; The 1st Level Section Descriptors are setup. Initialize the MMU and turn it on.
;
mov r1, #1
mcr p15, 0, r1, c3, c0, 0 ; setup access to domain 0
mcr p15, 0, r0, c8, c7, 0 ; flush I+D TLBs
mcr p15, 0, r1, c7, c10, 4 ; drain write and fill buffers
mov r1, #0x78 ; bits [6:3] must be written as 1's
orr r1, r1, #0x1 ; Enable: MMU
orr r1, r1, #0x1000 ; Enable icache
orr r1, r1, #0x0800 ; Enable BTB
orr r1, r1, #0x4 ; Enable Data Cache
ldr r2, =VirtualStart ; RVA
cmp r2, #0 ; make sure no stall on "mov pc,r2" below
;
; *Flip the MMU ON*
;
mcr p15, 0, r1, c1, c0, 0 ; MMU ON: All mem accesses now ~Virtual~
IF Interworking :LOR: Thumbing
bx r2
ELSE
mov pc, r2
ENDIF
nop
nop
nop
; **********************************
; MMU & caches now enabled.
;
; (r9) = physcial=virtual (direct mapped) address of 1st level page table
ALIGN
VirtualStart
;
; Set up a SVC mode stack
;
ldr sp, =EBOOT_PARTITION_VIR_C_BASE ; cached, virtual ram. Set Stack Pointer
add sp, sp, #StackOffset ; Space reserved for stack in the BOOT.BIB file
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Now that we have set up the MMU descriptors, are executing virtually, and
; have set up a stack, it is time to launch EBOOT.
;
IF :DEF: ETHBOOT
bl main ; **Jump to Main.c::main(), never to return.**
nop
nop
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