cpu-mem.fig

sdcc是为51等小型嵌入式cpu设计的c语言编译器支持数种不同类型的cpu

#FIG 3.2
Landscape
Center
Metric
A4      
100.00
Single
-2
1200 2
2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 1 0 3
	0 0 1.00 60.00 120.00
	 4320 2160 6660 2160 6660 2430
2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 1 0 3
	0 0 1.00 60.00 120.00
	 4320 2025 6840 2025 6840 2430
2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 1 2
	0 0 1.00 60.00 120.00
	 5175 2430 5175 2160
2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 1 2
	0 0 1.00 60.00 120.00
	 5355 2430 5355 2025
2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 1 0 3
	0 0 1.00 60.00 120.00
	 4320 1845 8460 1845 8460 2430
2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 1 3
	0 0 1.00 60.00 120.00
	 8640 2430 8640 1710 4320 1710
2 3 0 1 0 1 51 -1 20 0.000 0 0 -1 0 0 11
	 5580 3375 5490 3375 5670 3195 5850 3375 5760 3375 5760 3555
	 5850 3555 5670 3735 5490 3555 5580 3555 5580 3375
2 3 0 1 0 1 51 -1 20 0.000 0 0 -1 0 0 11
	 7020 3375 6930 3375 7110 3195 7290 3375 7200 3375 7200 3555
	 7290 3555 7110 3735 6930 3555 7020 3555 7020 3375
2 3 0 1 0 1 51 -1 20 0.000 0 0 -1 0 0 11
	 8775 3375 8685 3375 8865 3195 9045 3375 8955 3375 8955 3555
	 9045 3555 8865 3735 8685 3555 8775 3555 8775 3375
2 2 0 1 0 1 50 -1 20 0.000 0 0 -1 0 0 5
	 9090 3735 4320 3735 4320 3915 9090 3915 9090 3735
2 2 0 1 0 26 50 -1 20 0.000 0 0 -1 0 0 5
	 3150 1575 4320 1575 4320 4815 3150 4815 3150 1575
2 2 0 1 0 13 48 -1 20 0.000 0 0 -1 0 0 5
	 4995 4635 6210 4635 6210 5400 4995 5400 4995 4635
2 2 0 1 -1 17 50 -1 20 0.000 0 0 -1 0 0 5
	 5085 2430 6120 2430 6120 3195 5085 3195 5085 2430
2 2 0 1 0 17 50 -1 20 0.000 0 0 -1 0 0 5
	 6525 2430 7560 2430 7560 3195 6525 3195 6525 2430
2 2 0 1 0 15 50 -1 20 0.000 0 0 -1 0 0 5
	 8280 2430 9315 2430 9315 3195 8280 3195 8280 2430
2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 0 7
	 5130 1440 5220 1350 6210 1350 6300 1260 6390 1350 7380 1350
	 7470 1440
2 1 0 1 0 7 49 -1 -1 0.000 0 0 -1 0 0 7
	 8280 1440 8370 1350 8730 1350 8820 1260 8910 1350 9270 1350
	 9360 1440
2 1 0 1 0 7 53 -1 -1 0.000 0 0 -1 0 1 2
	0 0 1.00 60.00 120.00
	 5985 3195 5985 4635
2 1 0 1 0 7 53 -1 -1 0.000 0 0 -1 0 1 3
	0 0 1.00 60.00 120.00
	 7425 3195 7425 4815 6210 4815
2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 1 3
	0 0 1.00 60.00 120.00
	 9180 3195 9180 4950 6210 4950
2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 1 0 4
	0 0 1.00 60.00 120.00
	 4410 1710 4455 1755 4455 5265 4995 5265
2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 0 2
	 4410 1845 4455 1890
2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 0 2
	 4410 2025 4455 2070
2 1 0 1 0 7 46 -1 -1 0.000 0 0 -1 0 0 2
	 4410 2160 4455 2205
2 1 0 1 0 2 50 -1 20 0.000 0 0 -1 0 0 31
	 8460 3195 8640 3375 8550 3375 8550 4410 4680 4410 4860 4725
	 4860 4635 4995 4860 4860 5085 4860 4995 4590 4590 4320 4590
	 4320 4095 5175 4095 5175 3375 5085 3375 5265 3195 5445 3375
	 5355 3375 5355 4095 6615 4095 6615 3375 6525 3375 6705 3195
	 6885 3375 6795 3375 6795 4095 8370 4095 8370 3375 8280 3375
	 8460 3195
4 1 0 49 -1 16 12 0.0000 4 135 1035 7650 2070 Control lines\001
4 1 0 49 -1 16 12 0.0000 4 180 465 7650 2295 (R/W)\001
4 1 0 47 -1 16 12 0.0000 4 135 390 3690 3060 CPU\001
4 1 0 49 -1 16 12 0.0000 4 135 735 7920 3690 Data bus\001
4 1 0 49 -1 16 12 0.0000 4 135 1020 6480 4320 Address bus\001
4 1 0 46 -1 16 12 0.0000 4 135 705 5580 5220 Decoder\001
4 1 0 46 -1 16 12 0.0000 4 135 675 5580 4995 Address\001
4 1 0 48 -1 16 12 0.0000 4 135 510 5625 2880 Mem1\001
4 1 0 48 -1 16 12 0.0000 4 135 510 7065 2880 Mem2\001
4 1 0 48 -1 16 12 0.0000 4 135 510 8775 2880 Mem3\001
4 1 0 49 -1 16 12 0.0000 4 180 1380 6300 1125 Address Space I.\001
4 1 0 49 -1 16 12 0.0000 4 180 705 8820 1125 Space II.\001
4 1 0 49 -1 16 12 0.0000 4 135 675 8820 900 Address\001
4 1 0 46 -1 16 12 0.0000 4 180 1350 7695 5220 Chip select lines\001