xa.cc

sdcc是为51等小型嵌入式cpu设计的c语言编译器支持数种不同类型的cpu

    case IREGOFF16_DATA16 :
      sprintf(parm_str, "[%s+%04x], 0x%04x",
              w_reg_strs[((code >> 4) & 0x7)],
              (short)((get_mem(MEM_ROM_ID, addr+immed_offset+1)) |
                     (get_mem(MEM_ROM_ID, addr+immed_offset+0)<<8)),
              (short)((get_mem(MEM_ROM_ID, addr+immed_offset+3)) |
                     (get_mem(MEM_ROM_ID, addr+immed_offset+2)<<8)) );
      immed_offset += 4;
    break;
    case DIRECT_DATA8 :
      sprintf(parm_str, "%s,#0x%02x",
              get_dir_name(((code & 0x0070) << 4) | 
			   get_mem(MEM_ROM_ID, addr+immed_offset)),
              get_mem(MEM_ROM_ID, addr+immed_offset+1));
      immed_offset += 3;
    break;
    case DIRECT_DATA16 :
      sprintf(parm_str, "%s,#0x%04x",
              get_dir_name(((code & 0x0070) << 4) | 
			   get_mem(MEM_ROM_ID, addr+immed_offset)),
              get_mem(MEM_ROM_ID, addr+immed_offset+2) +
	      (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8));
      immed_offset += 3;
    break;

// odd-ball ones
    case NO_OPERANDS :  // for NOP
      strcpy(parm_str, "");
    break;
    case CY_BIT :
      sprintf(parm_str, "C,%s", 
	     get_bit_name(((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2)));
    break;
    case BIT_CY :
      sprintf(parm_str, "%s,C", 
	      get_bit_name(((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2)));
    break;
    case REG_DATA4 :
      strcpy(parm_str, "REG_DATA4");
    break;
    case REG_DATA5 :
      strcpy(parm_str, "REG_DATA5");
    break;
    case IREG_DATA4 :
      strcpy(parm_str, "IREG_DATA4");
    break;
    case IREGINC_DATA4 :
      strcpy(parm_str, "IREGINC_DATA4");
    break;
    case IREGOFF8_DATA4 :
      strcpy(parm_str, "IREGOFF8_DATA4");
    break;
    case IREGOFF16_DATA4 :
      strcpy(parm_str, "IREGOFF16_DATA4");
    break;
    case DIRECT_DATA4 :
      sprintf(parm_str, "%s,#0x%x",
	      get_dir_name(((code & 0x70)<<4) |
			   get_mem(MEM_ROM_ID, addr+2)),
	      code&0x0f);
    break;
    case DIRECT :
      sprintf(parm_str, "%s",
	      get_dir_name(((code & 0x007) << 4) + 
			   get_mem(MEM_ROM_ID, addr+2)));
    break;
    case REG :
      sprintf(parm_str, "%s",
              reg_strs[((code >> 4) & 0xf)] );
    break;
    case IREG :
      sprintf(parm_str, "[%s]",
              reg_strs[((code >> 4) & 0xf)] );
    break;
    case BIT_ALONE :
      sprintf(parm_str, "%s",
	      get_bit_name(((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2)));
    break;
    case BIT_REL8 :
      sprintf(parm_str, "%s,0x%04x",
	      get_bit_name((code&0x0003)<<8) + get_mem(MEM_ROM_ID, addr+2),
	      ((signed char)get_mem(MEM_ROM_ID, addr+3)*2+addr+len)&0xfffe);
    break;
    case DATA4:
      sprintf(parm_str, "#0x%02x", code&0x0f);
      break;
    case ADDR24 :
      sprintf(parm_str, "0x%06x", 
	     (get_mem(MEM_ROM_ID, addr+3)<<16) + 
	     (get_mem(MEM_ROM_ID, addr+1)<<8) + 
	     get_mem(MEM_ROM_ID, addr+2));
      break;
    break;
    case REG_REL8 :
      sprintf(parm_str, "%s,0x%04x",
	      reg_strs[(code>>4) & 0xf],
	      ((signed char)get_mem(MEM_ROM_ID, addr+2)*2+addr+len)&0xfffe);
    break;
    case DIRECT_REL8 :
      sprintf(parm_str, "%s,0x%04x",
	      get_dir_name(((code&0x07)<<8) +
			   get_mem(MEM_ROM_ID, addr+2)),
	      ((signed char)get_mem(MEM_ROM_ID, addr+2)*2+addr+len)&0xfffe);
    break;
    case REG_USP:
      sprintf(parm_str, "REG_USP");
    break;
    case USP_REG:
      sprintf(parm_str, "USP_REG");
    break;
    case REL8 :
      sprintf(parm_str, "0x%04x",
	      ((signed char)get_mem(MEM_ROM_ID, addr+1)*2+addr+len)&0xfffe);
    break;
    case REL16 :
      sprintf(parm_str, "0x%04x",
	      ((signed short)((get_mem(MEM_ROM_ID, addr+1)<<8) + get_mem(MEM_ROM_ID, addr+2))*2+addr+len)&0xfffe);
    break;

    case RLIST : {
      /* TODO: the list should be comma reperated
	 and maybe for POP the list should be reversed */
      unsigned char rlist=code&0xff;
      parm_str[0]='\0';
      if (code&0x0800) { // word list
	if (code&0x4000) { // R8-R15
	  if (rlist&0x80) strcat (parm_str, "R15 ");
	  if (rlist&0x40) strcat (parm_str, "R14");
	  if (rlist&0x20) strcat (parm_str, "R13 ");
	  if (rlist&0x10) strcat (parm_str, "R12 ");
	  if (rlist&0x08) strcat (parm_str, "R11 ");
	  if (rlist&0x04) strcat (parm_str, "R10 ");
	  if (rlist&0x02) strcat (parm_str, "R9 ");
	  if (rlist&0x01) strcat (parm_str, "R8 ");
	} else { // R7-R0
	  if (rlist&0x80) strcat (parm_str, "R7 ");
	  if (rlist&0x40) strcat (parm_str, "R6 ");
	  if (rlist&0x20) strcat (parm_str, "R5 ");
	  if (rlist&0x10) strcat (parm_str, "R4 ");
	  if (rlist&0x08) strcat (parm_str, "R3 ");
	  if (rlist&0x04) strcat (parm_str, "R2 ");
	  if (rlist&0x02) strcat (parm_str, "R1 ");
	  if (rlist&0x01) strcat (parm_str, "R0 ");
	}
      } else { // byte list
	if (code&0x4000) { //R7h-R4l
	  if (rlist&0x80) strcat (parm_str, "R7h ");
	  if (rlist&0x40) strcat (parm_str, "R7l ");
	  if (rlist&0x20) strcat (parm_str, "R6h ");
	  if (rlist&0x10) strcat (parm_str, "R6l ");
	  if (rlist&0x08) strcat (parm_str, "R5h ");
	  if (rlist&0x04) strcat (parm_str, "R5l ");
	  if (rlist&0x02) strcat (parm_str, "R4h ");
	  if (rlist&0x01) strcat (parm_str, "R4l ");
	} else { // R3h-R0l
	  if (rlist&0x80) strcat (parm_str, "R3h ");
	  if (rlist&0x40) strcat (parm_str, "R3l ");
	  if (rlist&0x20) strcat (parm_str, "R2h ");
	  if (rlist&0x10) strcat (parm_str, "R2l ");
	  if (rlist&0x08) strcat (parm_str, "R1h ");
	  if (rlist&0x04) strcat (parm_str, "R1l ");
	  if (rlist&0x02) strcat (parm_str, "R0h ");
	  if (rlist&0x01) strcat (parm_str, "R0l ");
	}
      }
    }
    break;

    case REG_DIRECT_REL8 :
      sprintf(parm_str, "%s,%s,0x%02x",
              reg_strs[((code >> 4) & 0xf)],
              get_dir_name(((code & 0x7) << 8) + 
			   get_mem(MEM_ROM_ID, addr+immed_offset)),
              ((signed char) get_mem(MEM_ROM_ID, addr+immed_offset+1) * 2) & 0xfffe );
    break;
    case REG_DATA8_REL8 :
      sprintf(parm_str, "%s,#0x%02x,0x%02x",
              reg_strs[((code >> 4) & 0xf)],
              get_mem(MEM_ROM_ID, addr+immed_offset+1),
              ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe );
    break;
    case REG_DATA16_REL8 :
      sprintf(parm_str, "%s,#0x%04x,0x%02x",
              w_reg_strs[(code >> 4) & 0xf],
              get_mem(MEM_ROM_ID, addr+immed_offset+2) +
                 (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8),
              ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe );
    break;
    case IREG_DATA8_REL8 :
      sprintf(parm_str, "[%s],#0x%02x,0x%02x",
              reg_strs[((code >> 4) & 0x7)],
              get_mem(MEM_ROM_ID, addr+immed_offset+1),
              ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe );
    break;
    case IREG_DATA16_REL8 :
      sprintf(parm_str, "[%s],#0x%04x,0x%02x",
              w_reg_strs[(code >> 4) & 0x7],
              get_mem(MEM_ROM_ID, addr+immed_offset+2) +
	        (get_mem(MEM_ROM_ID, addr+immed_offset+1)<<8),
              ((signed char)get_mem(MEM_ROM_ID, addr+immed_offset) * 2) & 0xfffe );
    break;

    case A_APLUSDPTR :
      strcpy(parm_str, "A, [A+DPTR]");
    break;

    case A_APLUSPC :
      strcpy(parm_str, "A, [A+PC]");
    break;

    case REG_REGOFF8 :
      sprintf(parm_str, "%s,%s+0x%02x", 
	      w_reg_strs[(code >> 4) & 0x7],
	      w_reg_strs[code & 0x7],
	      get_mem(MEM_ROM_ID, addr+immed_offset));
      break;

    case REG_REGOFF16 :
      sprintf(parm_str, "%s,%s+0x%02x", 
	      w_reg_strs[(code >> 4) & 0x7],
	      w_reg_strs[code & 0x7],
	      get_mem(MEM_ROM_ID, addr+immed_offset+1) +
	        (get_mem(MEM_ROM_ID, addr+immed_offset+0)<<8));
      break;

    case A_PLUSDPTR :
      strcpy(parm_str, "[A+DPTR]");
      break;

    case IIREG :
      sprintf(parm_str, "[[%s]]",
              w_reg_strs[(code & 0x7)]);
      break;

    default:
      strcpy(parm_str, "???");
    break;
  }

  sprintf(work, "%s %s",
          op_mnemonic_str[ mnemonic ],
          parm_str);

  p= strchr(work, ' ');
  if (!p)
    {
      buf= strdup(work);
      return(buf);
    }
  if (sep == NULL)
    buf= (char *)malloc(6+strlen(p)+1);
  else
    buf= (char *)malloc((p-work)+strlen(sep)+strlen(p)+1);

  for (p= work, b= buf; *p != ' '; p++, b++)
    *b= *p;
  p++;
  *b= '\0';
  if (sep == NULL)
    {
      while (strlen(buf) < 6)
        strcat(buf, " ");
    }
  else
    strcat(buf, sep);
  strcat(buf, p);
  return(buf);
}

/*--------------------------------------------------------------------
 print_regs - Print the registers, flags and other useful information.
   Used to print a status line while stepping through the code.
|--------------------------------------------------------------------*/
void
cl_xa::print_regs(class cl_console *con)
{
  unsigned char flags;

  flags = get_psw();
  con->dd_printf("CA---VNZ | ", flags);
  con->dd_printf("R0:%04x R1:%04x R2:%04x R3:%04x\n",
                 reg2(0), reg2(1), reg2(2), reg2(3));

  con->dd_printf("%c%c---%c%c%c | ",
         (flags & BIT_C)?'1':'0',
         (flags & BIT_AC)?'1':'0',
         (flags & BIT_V)?'1':'0',
         (flags & BIT_N)?'1':'0',
         (flags & BIT_Z)?'1':'0');

  con->dd_printf("R4:%04x R5:%04x R6:%04x SP:%04x ES:%04x  DS:%04x\n",
                 reg2(4), reg2(5), reg2(6), reg2(7), 0, 0);

  print_disass(PC, con);
}


/*--------------------------------------------------------------------
 exec_inst - Called to implement simulator execution of 1 instruction
   at the current PC(program counter) address.
|--------------------------------------------------------------------*/
int cl_xa::exec_inst(void)
{
  t_mem code1;
  uint code;
  int i;
  int operands;

  if (fetch(&code1))
    return(resBREAKPOINT);
  tick(1);

/* the following lookups make for a slow simulation, we will
  figure out how to make it fast later... */

  /* scan to see if its a 1 byte-opcode */
  code = (code1 << 8);
  i= 0;
  while ( ((code & disass_xa[i].mask) != disass_xa[i].code ||
          (!disass_xa[i].is1byte)) /* not a one byte op code */
                    &&
         disass_xa[i].mnemonic != BAD_OPCODE)
    i++;

  if (disass_xa[i].mnemonic == BAD_OPCODE) {
    /* hit the end of the list, must be a 2 or more byte opcode */
    /* fetch another code byte and search the list again */
      //if (fetch(&code2))  ?not sure if break allowed in middle of opcode?
      //  return(resBREAKPOINT);
    code |= fetch();  /* add 2nd opcode */

    i= 0;
    while ((code & disass_xa[i].mask) != disass_xa[i].code &&
           disass_xa[i].mnemonic != BAD_OPCODE)
      i++;
    /* we should have found the opcode by now, if not invalid entry at eol */
  }

  operands = (int)(disass_xa[i].operands);
  switch (disass_xa[i].mnemonic)
  {
    case ADD:
    return inst_ADD(code, operands);
    case ADDC:
    return inst_ADDC(code, operands);
    case ADDS:
    return inst_ADDS(code, operands);
    case AND:
    return inst_AND(code, operands);
    case ANL:
    return inst_ANL(code, operands);
    case ASL:
    return inst_ASL(code, operands);
    case ASR:
    return inst_ASR(code, operands);
    case BCC:
    return inst_BCC(code, operands);
    case BCS:
    return inst_BCS(code, operands);
    case BEQ:
    return inst_BEQ(code, operands);
    case BG:
    return inst_BG(code, operands);
    case BGE:
    return inst_BGE(code, operands);
    case BGT:
    return inst_BGT(code, operands);
    case BKPT:
    return inst_BKPT(code, operands);
    case BL:
    return inst_BL(code, operands);
    case BLE:
    return inst_BLE(code, operands);
    case BLT:
    return inst_BLT(code, operands);
    case BMI:
    return inst_BMI(code, operands);
    case BNE:
    return inst_BNE(code, operands);
    case BNV:
    return inst_BNV(code, operands);
    case BOV:
    return inst_BOV(code, operands);
    case BPL:
    return inst_BPL(code, operands);
    case BR:
    return inst_BR(code, operands);
    case CALL:
    return inst_CALL(code, operands);
    case CJNE:
    return inst_CJNE(code, operands);
    case CLR:
    return inst_CLR(code, operands);
    case CMP:
    return inst_CMP(code, operands);
    case CPL:
    return inst_CPL(code, operands);
    case DA:
    return inst_DA(code, operands);
    case DIV_w :
    case DIV_d :
    case DIVU_b:
    case DIVU_w:
    case DIVU_d:
    return inst_DIV(code, operands);
    case DJNZ:
    return inst_DJNZ(code, operands);
    case FCALL:
    return inst_FCALL(code, operands);
    case FJMP:
    return inst_FJMP(code, operands);
    case JB:
    return inst_JB(code, operands);
    case JBC:
    return inst_JBC(code, operands);
    case JMP:
    return inst_JMP(code, operands);
    case JNB:
    return inst_JNB(code, operands);
    case JNZ:
    return inst_JNZ(code, operands);
    case JZ:
    return inst_JZ(code, operands);
    case LEA:
    return inst_LEA(code, operands);
    case LSR:
    return inst_LSR(code, operands);
    case MOV:
    return inst_MOV(code, operands);
    case MOVC:
    return inst_MOVC(code, operands);
    case MOVS:
    return inst_MOVS(code, operands);
    case MOVX:
    return inst_MOVX(code, operands);
    case MUL_w:
    case MULU_b:
    case MULU_w:
    return inst_MUL(code, operands);
    case NEG:
    return inst_NEG(code, operands);
    case NOP:
    return inst_NOP(code, operands);
    case NORM:
    return inst_NORM(code, operands);
    case OR:
    return inst_OR(code, operands);
    case ORL:
    return inst_ORL(code, operands);
    case POP:
    case POPU:
    return inst_POP(code, operands);
    case PUSH:
    case PUSHU:
    return inst_PUSH(code, operands);
    case RESET:
    return inst_RESET(code, operands);
    case RET:
    return inst_RET(code, operands);
    case RETI:
    return inst_RETI(code, operands);
    case RL:
    return inst_RL(code, operands);
    case RLC:
    return inst_RLC(code, operands);
    case RR:
    return inst_RR(code, operands);
    case RRC:
    return inst_RRC(code, operands);
    case SETB:
    return inst_SETB(code, operands);
    case SEXT:
    return inst_SEXT(code, operands);
    case SUB:
    return inst_SUB(code, operands);
    case SUBB:
    return inst_SUBB(code, operands);
    case TRAP:
    return inst_TRAP(code, operands);
    case XCH:
    return inst_XCH(code, operands);
    case XOR:
    return inst_XOR(code, operands);

    case BAD_OPCODE:
    default:
    break;
  }

  /*if (PC)
    PC--;
  else
  PC= get_mem_size(MEM_ROM_ID)-1;*/
  PC= rom->inc_address(PC, -1);
  //tick(-clock_per_cycle());
  sim->stop(resINV_INST);
  return(resINV_INST);
}


/* End of xa.src/xa.cc */