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📄 msc1210.h

📁 sdcc是为51等小型嵌入式cpu设计的c语言编译器支持数种不同类型的cpu
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/*--------------------------------------------------------------------------
 * Register Declarations for Texas Intruments MSC12xx MCU family
 *
 * Written By - Philippe Latu / philippe.latu(at)linux-france.org
 * $Id: msc1210.h 893 2006-05-10 21:32:22Z latu $
 *
 * Copyright (C) 2006  Philippe Latu
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2.1 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
 *
 *---------------------------------------------------------------------------*/

#ifndef __MSC1210_H__
#define __MSC1210_H__

/*  BYTE Registers with bit definitions */

__sfr __at (0x80) P0;           /* Port 0                               */
__sfr __at (0x81) SP;           /* Stack Pointer                        */
__sfr __at (0x82) DPL;          /* Data Pointer 0: low byte             */
__sfr __at (0x82) DPL0;         /* Data Pointer 0: low byte             */
__sfr __at (0x83) DPH;          /* Data Pointer 0: high byte            */
__sfr __at (0x83) DPH0;         /* Data Pointer 0: high byte            */
__sfr __at (0x84) DPL1;         /* Data Pointer 1: low byte             */
__sfr __at (0x85) DPH1;         /* Data Pointer 1: high byte            */
__sfr __at (0x86) DPS;          /* Data Pointer Select                  */
__sfr __at (0x87) PCON;         /* Power Control                        */
__sfr __at (0x88) TCON;         /* Timer Control                        */
        /*  _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_                             */
        /* |TF1|TR1|TF0|TR0|IE1|IT1|IE0|IT0|                            */
  __sbit __at (0x88) IT0;         /* External Interrupt 0 Type          */
  __sbit __at (0x89) IE0;         /* External Interrupt 0 Edge Flag     */
  __sbit __at (0x8a) IT1;         /* External Interrupt 1 Type          */
  __sbit __at (0x8b) IE1;         /* External Interrupt 1 Edge Flag     */
  __sbit __at (0x8c) TR0;         /* Timer 0 On/Off Control             */
  __sbit __at (0x8d) TF0;         /* Timer 0 Overflow Flag              */
  __sbit __at (0x8e) TR1;         /* Timer 1 On/Off Control             */
  __sbit __at (0x8f) TF1;         /* Timer 1 Overflow Flag              */
__sfr __at (0x89) TMOD;         /* Timer Mode                           */
__sfr __at (0x8a) TL0;          /* Timer 0: low byte                    */
__sfr __at (0x8b) TL1;          /* Timer 1: low byte                    */
__sfr __at (0x8c) TH0;          /* Timer 0: high byte                   */
__sfr __at (0x8d) TH1;          /* Timer 1: high byte                   */
__sfr __at (0x8e) CKCON;        /* Clock Control                        */
__sfr __at (0x8f) MWS;          /* Memory Write Select                  */
__sfr __at (0x90) P1;           /* Port 1                               */
        /*  _7_ _6_ _5_ _4_ _3_ _2_ _1_  _0_                            */
        /* |   |   |   |   |   |   |T2EX|T2 |                           */
  __sbit __at (0x90) T2;          /* Timer 2 External Input             */
  __sbit __at (0x91) T2EX;        /* Timer 2 Capture/Reload             */
__sfr __at (0x91) EXIF;         /* External Interrupt Flag              */
__sfr __at (0x92) MPAGE;        /* Memory Page                          */
__sfr __at (0x92) _XPAGE;       /* XDATA/PDATA PAGE                     */
__sfr __at (0x93) CADDR;        /* Configuration Address Register       */
__sfr __at (0x94) CDATA;        /* Configuration Data Register          */
__sfr __at (0x95) MCON;         /* Memory Configuration                 */
__sfr __at (0x98) SCON;         /* Serial Control 0                     */
__sfr __at (0x98) SCON0;        /* Serial Control 0                     */
        /*  _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_                             */
        /* |SM0|SM1|SM2|REN|TB8|RB8|TI |RI |                            */
  __sbit __at (0x98) RI;          /* Receive Interrupt Flag             */
  __sbit __at (0x98) RI0;         /* Receive Interrupt Flag             */
  __sbit __at (0x98) RI_0;        /* Receive Interrupt Flag             */
  __sbit __at (0x99) TI;          /* Transmit Interrupt Flag            */
  __sbit __at (0x99) TI0;         /* Transmit Interrupt Flag            */
  __sbit __at (0x99) TI_0;        /* Transmit Interrupt Flag            */
  __sbit __at (0x9a) RB8;         /* Receive Bit 8                      */
  __sbit __at (0x9a) RB8_0;       /* Receive Bit 8                      */
  __sbit __at (0x9b) TB8;         /* Transmit Bit 8                     */
  __sbit __at (0x9b) TB8_0;       /* Transmit Bit 8                     */
  __sbit __at (0x9c) REN;         /* Receive Enable                     */
  __sbit __at (0x9c) REN_0;       /* Receive Enable                     */
  __sbit __at (0x9d) SM2;         /* Multiprocessor Communication Enable*/
  __sbit __at (0x9d) SM2_0;       /* Multiprocessor Communication Enable*/
  __sbit __at (0x9e) SM1;         /* Serial Port Select Mode 1          */
  __sbit __at (0x9e) SM1_0;       /* Serial Port Select Mode 1          */
  __sbit __at (0x9f) SM0;         /* Serial Port Select Mode 0          */
  __sbit __at (0x9f) SM0_0;       /* Serial Port Select Mode 0          */
__sfr __at (0x99) SBUF;         /* Serial Buffer 0                      */
__sfr __at (0x99) SBUF0;        /* Serial Buffer 0                      */
__sfr __at (0x9a) SPICON;       /* SPI Control                          */
__sfr __at (0x9a) I2CCON;       /* I2C Control                          */
        /*  _7_   _6_   _5_   _4_  _3_   _2_  _1_  _0_                  */
        /* |SCLK2|SCLK1|SCLK0|FIFO|ORDER|MSTR|CPHA|CPOL|                */
  __sbit __at (0x9a) CPOL;        /* Serial Clock Polarity              */
  __sbit __at (0x9b) CPHA;        /* Serial Clock Phase Control         */
  __sbit __at (0x9c) MSTR;        /* Set Master Mode                    */
  __sbit __at (0x9d) ORDER;       /* Set Bit Order Transmit/Receive     */
  __sbit __at (0x9e) FIFO;        /* Enable Fifo Buffer                 */
  __sbit __at (0x9f) SCLK0;       /* Clock Divider Select 0             */
  __sbit __at (0xa0) SCLK1;       /* Clock Divider Select 1             */
  __sbit __at (0xa1) SCLK2;       /* Clock Divider Select 2             */
__sfr __at (0x9b) SPIDATA;      /* SPI Data                             */
__sfr __at (0x9b) I2CDATA;      /* I2C Data                             */
__sfr __at (0x9c) SPIRCON;      /* SPI Receive Control                  */
__sfr __at (0x9c) I2CGM;        /* I2C GM Register                      */
__sfr __at (0x9d) SPITCON;      /* SPI Transmit Control                 */
__sfr __at (0x9d) I2CSTAT;      /* I2C Status                           */
__sfr __at (0x9e) SPISTART;     /* SPI Buffer Start Address             */
__sfr __at (0x9e) I2CSTART;     /* I2C Start                            */
__sfr __at (0x9f) SPIEND;       /* SPI Buffer End Address               */
__sfr __at (0xa0) P2;           /* Port 2                               */
__sfr __at (0xa1) PWMCON;       /* PWM Control                          */
        /*  _7_ _6_ _5_  _4_    _3_    _2_     _1_     _0_              */
        /* |   |   |PPOL|PWMSEL|SPDSEL|TPCNTL2|TPCNTL1|TPCNTL0|         */
  __sbit __at (0xa1) TPCNTL0;     /* Generator Control                  */
  __sbit __at (0xa2) TPCNTL1;     /* Generator Control                  */
  __sbit __at (0xa3) TPCNTL2;     /* Generator Control                  */
  __sbit __at (0xa4) SPDSEL;      /* Speed Selection                    */
  __sbit __at (0xa5) PWMSEL;      /* PWM Register Select                */
  __sbit __at (0xa6) PPOL;        /* Period Polarity                    */
__sfr __at (0xa2) PWMLOW;       /* PWM low byte                         */
__sfr __at (0xa2) TONELOW;      /* Tone low byte                        */
__sfr __at (0xa3) PWMHI;        /* PWM high byte                        */
__sfr __at (0xa3) TONEHI;       /* Tone high byte                       */
__sfr __at (0xa4) AIPOL;        /* Auxiliary Interrupt Poll             */
__sfr __at (0xa5) PAI;          /* Pending Auxiliary Interrupt          */
__sfr __at (0xa6) AIE;          /* Auxiliary Interrupt Enable           */
__sfr __at (0xa7) AISTAT;       /* Auxiliary Interrupt Status           */
__sfr __at (0xa8) IE;           /* Interrupt Enable                     */
        /*  _7_ _6_ _5_ _4_ _3_ _2_ _1_ _0_                             */
        /* |EA |ES1|ET2|ES0|ET1|EX1|ET0|EX0|                            */
  __sbit __at (0xa8) EX0;         /* Enable External Interrupt 0        */
  __sbit __at (0xa9) ET0;         /* Enable Timer 0 Interrupt           */
  __sbit __at (0xaa) EX1;         /* Enable External Interrupt 1        */
  __sbit __at (0xab) ET1;         /* Enable Timer 1 Interrupt           */
  __sbit __at (0xac) ES0;         /* Enable Serial Port 0 Interrupt     */
  __sbit __at (0xad) ET2;         /* Enable Timer 2 Interrupt           */
  __sbit __at (0xae) ES1;         /* Enable Serial Port 1 Interrupt     */
  __sbit __at (0xaf) EA;          /* Global Interrupt Enable            */
__sfr __at (0xa9) BPCON;        /* Breakpoint Control                   */
__sfr __at (0xaa) BPL;          /* Breakpoint Address Low               */
__sfr __at (0xab) BPH;          /* Breakpoint Address High              */
__sfr __at (0xac) P0DDRL;       /* Port 0 Data Direction Low            */
__sfr __at (0xad) P0DDRH;       /* Port 0 Data Direction High           */
__sfr __at (0xae) P1DDRL;       /* Port 1 Data Direction Low            */
__sfr __at (0xaf) P1DDRH;       /* Port 1 Data Direction High           */
__sfr __at (0xb0) P3;           /* Port 3                               */
        /*  _7_ _6_ _5_ _4_ _3_  _2_  _1_ _0_                           */
        /* |RD |WR |T1 |T0 |INT1|INT0|TXD|RXD|                          */
  __sbit __at (0xb0) RXD;         /* Serial Port 0 Receive              */
  __sbit __at (0xb0) RXD0;        /* Serial Port 0 Receive              */
  __sbit __at (0xb1) TXD;         /* Serial Port 0 Transmit             */
  __sbit __at (0xb1) TXD0;        /* Serial Port 0 Transmit             */
  __sbit __at (0xb2) INT0;        /* External Interrupt 0               */
  __sbit __at (0xb3) INT1;        /* External Interrupt 1               */
  __sbit __at (0xb4) T0;          /* Timer 0 External Input             */

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