⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 pic16f676.h

📁 sdcc是为51等小型嵌入式cpu设计的c语言编译器支持数种不同类型的cpu
💻 H
📖 第 1 页 / 共 2 页
字号:
//// Register Declarations for Microchip 16F676 Processor////// This header file was automatically generated by:////	inc2h.pl V1.6////	Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved////	SDCC is licensed under the GNU Public license (GPL) v2.  Note that//	this license covers the code to the compiler and other executables,//	but explicitly does not cover any code or objects generated by sdcc.//	We have not yet decided on a license for the run time libraries, but//	it will not put any requirements on code linked against it. See:// //	http://www.gnu.org/copyleft/gpl/html////	See http://sdcc.sourceforge.net/ for the latest information on sdcc.//// #ifndef P16F676_H#define P16F676_H//// Register addresses.//#define INDF_ADDR	0x0000#define TMR0_ADDR	0x0001#define PCL_ADDR	0x0002#define STATUS_ADDR	0x0003#define FSR_ADDR	0x0004#define PORTA_ADDR	0x0005#define PORTC_ADDR	0x0007#define PCLATH_ADDR	0x000A#define INTCON_ADDR	0x000B#define PIR1_ADDR	0x000C#define TMR1L_ADDR	0x000E#define TMR1H_ADDR	0x000F#define T1CON_ADDR	0x0010#define CMCON_ADDR	0x0019#define ADRESH_ADDR	0x001E#define ADCON0_ADDR	0x001F#define OPTION_REG_ADDR	0x0081#define TRISA_ADDR	0x0085#define TRISC_ADDR	0x0087#define PIE1_ADDR	0x008C#define PCON_ADDR	0x008E#define OSCCAL_ADDR	0x0090#define ANSEL_ADDR	0x0091#define WPU_ADDR	0x0095#define WPUA_ADDR	0x0095#define IOC_ADDR	0x0096#define IOCA_ADDR	0x0096#define VRCON_ADDR	0x0099#define EEDATA_ADDR	0x009A#define EEDAT_ADDR	0x009A#define EEADR_ADDR	0x009B#define EECON1_ADDR	0x009C#define EECON2_ADDR	0x009D#define ADRESL_ADDR	0x009E#define ADCON1_ADDR	0x009F//// Memory organization.//#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000	// INDF#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000	// TMR0#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000	// PCL#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000	// STATUS#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000	// FSR#pragma memmap PORTA_ADDR PORTA_ADDR SFR 0x000	// PORTA#pragma memmap PORTC_ADDR PORTC_ADDR SFR 0x000	// PORTC#pragma memmap PCLATH_ADDR PCLATH_ADDR SFR 0x000	// PCLATH#pragma memmap INTCON_ADDR INTCON_ADDR SFR 0x000	// INTCON#pragma memmap PIR1_ADDR PIR1_ADDR SFR 0x000	// PIR1#pragma memmap TMR1L_ADDR TMR1L_ADDR SFR 0x000	// TMR1L#pragma memmap TMR1H_ADDR TMR1H_ADDR SFR 0x000	// TMR1H#pragma memmap T1CON_ADDR T1CON_ADDR SFR 0x000	// T1CON#pragma memmap CMCON_ADDR CMCON_ADDR SFR 0x000	// CMCON#pragma memmap ADRESH_ADDR ADRESH_ADDR SFR 0x000	// ADRESH#pragma memmap ADCON0_ADDR ADCON0_ADDR SFR 0x000	// ADCON0#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000	// OPTION_REG#pragma memmap TRISA_ADDR TRISA_ADDR SFR 0x000	// TRISA#pragma memmap TRISC_ADDR TRISC_ADDR SFR 0x000	// TRISC#pragma memmap PIE1_ADDR PIE1_ADDR SFR 0x000	// PIE1#pragma memmap PCON_ADDR PCON_ADDR SFR 0x000	// PCON#pragma memmap OSCCAL_ADDR OSCCAL_ADDR SFR 0x000	// OSCCAL#pragma memmap ANSEL_ADDR ANSEL_ADDR SFR 0x000	// ANSEL#pragma memmap WPU_ADDR WPU_ADDR SFR 0x000	// WPU#pragma memmap WPUA_ADDR WPUA_ADDR SFR 0x000	// WPUA#pragma memmap IOC_ADDR IOC_ADDR SFR 0x000	// IOC#pragma memmap IOCA_ADDR IOCA_ADDR SFR 0x000	// IOCA#pragma memmap VRCON_ADDR VRCON_ADDR SFR 0x000	// VRCON#pragma memmap EEDATA_ADDR EEDATA_ADDR SFR 0x000	// EEDATA#pragma memmap EEDAT_ADDR EEDAT_ADDR SFR 0x000	// EEDAT#pragma memmap EEADR_ADDR EEADR_ADDR SFR 0x000	// EEADR#pragma memmap EECON1_ADDR EECON1_ADDR SFR 0x000	// EECON1#pragma memmap EECON2_ADDR EECON2_ADDR SFR 0x000	// EECON2#pragma memmap ADRESL_ADDR ADRESL_ADDR SFR 0x000	// ADRESL#pragma memmap ADCON1_ADDR ADCON1_ADDR SFR 0x000	// ADCON1//         LIST// P16F676.INC  Standard Header File, Version 1.00    Microchip Technology, Inc.//         NOLIST// This header file defines configurations, registers, and other useful bits of// information for the PIC16F676 microcontroller.  These names are taken to match // the data sheets as closely as possible.  // Note that the processor must be selected before this file is // included.  The processor may be selected the following ways://       1. Command line switch://               C:\ MPASM MYFILE.ASM /PIC16F676//       2. LIST directive in the source file//               LIST   P=PIC16F676//       3. Processor Type entry in the MPASM full-screen interface//==========================================================================////       Revision History////==========================================================================//1.00   05/13/02 Original//==========================================================================////       Verify Processor////==========================================================================//        IFNDEF __16F676//            MESSG "Processor-header file mismatch.  Verify selected processor."//         ENDIF//==========================================================================////       Register Definitions////==========================================================================#define W                    0x0000#define F                    0x0001//----- Register Files------------------------------------------------------extern __data __at (INDF_ADDR) volatile char      INDF;extern __sfr  __at (TMR0_ADDR)                    TMR0;extern __data __at (PCL_ADDR) volatile char       PCL;extern __sfr  __at (STATUS_ADDR)                  STATUS;extern __sfr  __at (FSR_ADDR)                     FSR;extern __sfr  __at (PORTA_ADDR)                   PORTA;extern __sfr  __at (PORTC_ADDR)                   PORTC;extern __sfr  __at (PCLATH_ADDR)                  PCLATH;extern __sfr  __at (INTCON_ADDR)                  INTCON;extern __sfr  __at (PIR1_ADDR)                    PIR1;extern __sfr  __at (TMR1L_ADDR)                   TMR1L;		extern __sfr  __at (TMR1H_ADDR)                   TMR1H;		extern __sfr  __at (T1CON_ADDR)                   T1CON;		extern __sfr  __at (CMCON_ADDR)                   CMCON;		extern __sfr  __at (ADRESH_ADDR)                  ADRESH;		extern __sfr  __at (ADCON0_ADDR)                  ADCON0;		extern __sfr  __at (OPTION_REG_ADDR)              OPTION_REG;extern __sfr  __at (TRISA_ADDR)                   TRISA;extern __sfr  __at (TRISC_ADDR)                   TRISC;extern __sfr  __at (PIE1_ADDR)                    PIE1;extern __sfr  __at (PCON_ADDR)                    PCON;extern __sfr  __at (OSCCAL_ADDR)                  OSCCAL;extern __sfr  __at (ANSEL_ADDR)                   ANSEL;		extern __sfr  __at (WPU_ADDR)                     WPU;extern __sfr  __at (WPUA_ADDR)                    WPUA;extern __sfr  __at (IOC_ADDR)                     IOC;extern __sfr  __at (IOCA_ADDR)                    IOCA;extern __sfr  __at (VRCON_ADDR)                   VRCON;extern __sfr  __at (EEDATA_ADDR)                  EEDATA;	extern __sfr  __at (EEDAT_ADDR)                   EEDAT;	extern __sfr  __at (EEADR_ADDR)                   EEADR;	extern __sfr  __at (EECON1_ADDR)                  EECON1;extern __sfr  __at (EECON2_ADDR)                  EECON2;extern __sfr  __at (ADRESL_ADDR)                  ADRESL;		extern __sfr  __at (ADCON1_ADDR)                  ADCON1;//----- STATUS Bits --------------------------------------------------------//----- INTCON Bits --------------------------------------------------------//----- PIR1 Bits ----------------------------------------------------------//----- T1CON Bits ---------------------------------------------------------//----- CMCON Bits --------------------------------------------------------//----- ADCON0 Bits --------------------------------------------------------//----- OPTION Bits --------------------------------------------------------//----- PIE1 Bits ----------------------------------------------------------//----- PCON Bits ----------------------------------------------------------//----- OSCCAL Bits --------------------------------------------------------//----- ANSEL --------------------------------------------------------------//----- VRCON Bits ---------------------------------------------------------//----- EECON1 -------------------------------------------------------------//----- ADCON1 -------------------------------------------------------------//==========================================================================////       RAM Definition////==========================================================================//         __MAXRAM H'FF'//         __BADRAM H'06', H'08'-H'09', H'0D', H'11'-H'18', H'1A'-H'1D', H'60'-H'7F'//         __BADRAM H'86', H'88'-H'89', H'8D', H'8F', H'92'-H'94', H'97'-H'98', H'E0'-H'FF'//==========================================================================////       Configuration Bits////==========================================================================#define _CPD                 0x3EFF#define _CPD_OFF             0x3FFF#define _CP                  0x3F7F#define _CP_OFF              0x3FFF#define _BODEN               0x3FFF#define _BODEN_OFF           0x3FBF#define _MCLRE_ON            0x3FFF#define _MCLRE_OFF           0x3FDF#define _PWRTE_OFF           0x3FFF#define _PWRTE_ON            0x3FEF#define _WDT_ON              0x3FFF#define _WDT_OFF             0x3FF7#define _LP_OSC              0x3FF8#define _XT_OSC              0x3FF9#define _HS_OSC              0x3FFA#define _EC_OSC              0x3FFB#define _INTRC_OSC_NOCLKOUT  0x3FFC#define _INTRC_OSC_CLKOUT    0x3FFD#define _EXTRC_OSC_NOCLKOUT  0x3FFE#define _EXTRC_OSC_CLKOUT    0x3FFF//         LIST// ----- ADCON0 bits --------------------typedef union {  struct {    unsigned char ADON:1;    unsigned char GO:1;    unsigned char CHS0:1;    unsigned char CHS1:1;    unsigned char CHS2:1;    unsigned char :1;    unsigned char VCFG:1;    unsigned char ADFM:1;  };  struct {    unsigned char :1;    unsigned char NOT_DONE:1;    unsigned char :1;    unsigned char :1;    unsigned char :1;    unsigned char :1;    unsigned char :1;    unsigned char :1;  };  struct {    unsigned char :1;    unsigned char GO_DONE:1;    unsigned char :1;    unsigned char :1;

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -