📄 pic16c433.h
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//// Register Declarations for Microchip 16C433 Processor////// This header file was automatically generated by://// inc2h.pl V1.6//// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved//// SDCC is licensed under the GNU Public license (GPL) v2. Note that// this license covers the code to the compiler and other executables,// but explicitly does not cover any code or objects generated by sdcc.// We have not yet decided on a license for the run time libraries, but// it will not put any requirements on code linked against it. See:// // http://www.gnu.org/copyleft/gpl/html//// See http://sdcc.sourceforge.net/ for the latest information on sdcc.//// #ifndef P16C433_H#define P16C433_H//// Register addresses.//#define INDF_ADDR 0x0000#define TMR0_ADDR 0x0001#define PCL_ADDR 0x0002#define STATUS_ADDR 0x0003#define FSR_ADDR 0x0004#define GPIO_ADDR 0x0005#define PCLATH_ADDR 0x000A#define INTCON_ADDR 0x000B#define PIR1_ADDR 0x000C#define ADRES_ADDR 0x001E#define ADCON0_ADDR 0x001F#define OPTION_REG_ADDR 0x0081#define TRISIO_ADDR 0x0085#define PIE1_ADDR 0x008C#define PCON_ADDR 0x008E#define OSCCAL_ADDR 0x008F#define ADCON1_ADDR 0x009F//// Memory organization.//#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000 // INDF#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000 // TMR0#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000 // PCL#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000 // STATUS#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000 // FSR#pragma memmap GPIO_ADDR GPIO_ADDR SFR 0x000 // GPIO#pragma memmap PCLATH_ADDR PCLATH_ADDR SFR 0x000 // PCLATH#pragma memmap INTCON_ADDR INTCON_ADDR SFR 0x000 // INTCON#pragma memmap PIR1_ADDR PIR1_ADDR SFR 0x000 // PIR1#pragma memmap ADRES_ADDR ADRES_ADDR SFR 0x000 // ADRES#pragma memmap ADCON0_ADDR ADCON0_ADDR SFR 0x000 // ADCON0#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000 // OPTION_REG#pragma memmap TRISIO_ADDR TRISIO_ADDR SFR 0x000 // TRISIO#pragma memmap PIE1_ADDR PIE1_ADDR SFR 0x000 // PIE1#pragma memmap PCON_ADDR PCON_ADDR SFR 0x000 // PCON#pragma memmap OSCCAL_ADDR OSCCAL_ADDR SFR 0x000 // OSCCAL#pragma memmap ADCON1_ADDR ADCON1_ADDR SFR 0x000 // ADCON1// LIST// P16C433.INC Standard Header File, Version 1.00 Microchip Technology, Inc.// NOLIST// This header file defines configurations, registers, and other useful bits of// information for the PIC16C433 microcontroller. These names are taken to match // the data sheets as closely as possible. // Note that the processor must be selected before this file is // included. The processor may be selected the following ways:// 1. Command line switch:// C:\ MPASM MYFILE.ASM /PIC16C433// 2. LIST directive in the source file// LIST P=PIC16C433// 3. Processor Type entry in the MPASM full-screen interface//==========================================================================//// Revision History////==========================================================================//Rev: Date: Reason://1.00 31 Aug 2000 Original Release//1.10 28 Mar 2001 Corrected definitions of LINTX and LINRX.//==========================================================================//// Verify Processor////==========================================================================// IFNDEF __16C433// MESSG "Processor-header file mismatch. Verify selected processor."// ENDIF//==========================================================================//// Register Definitions////==========================================================================#define W 0x0000#define F 0x0001//----- Register Files------------------------------------------------------extern __data __at (INDF_ADDR) volatile char INDF;extern __sfr __at (TMR0_ADDR) TMR0;extern __data __at (PCL_ADDR) volatile char PCL;extern __sfr __at (STATUS_ADDR) STATUS;extern __sfr __at (FSR_ADDR) FSR;extern __sfr __at (GPIO_ADDR) GPIO;extern __sfr __at (PCLATH_ADDR) PCLATH;extern __sfr __at (INTCON_ADDR) INTCON;extern __sfr __at (PIR1_ADDR) PIR1;extern __sfr __at (ADRES_ADDR) ADRES;extern __sfr __at (ADCON0_ADDR) ADCON0;extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;extern __sfr __at (TRISIO_ADDR) TRISIO;extern __sfr __at (PIE1_ADDR) PIE1;extern __sfr __at (PCON_ADDR) PCON;extern __sfr __at (OSCCAL_ADDR) OSCCAL;extern __sfr __at (ADCON1_ADDR) ADCON1;//----- STATUS Bits --------------------------------------------------------//----- LIN Port bits (within GPIO) ----------------------------------------//----- ADCON0 Bits --------------------------------------------------------//----- INTCON Bits --------------------------------------------------------//----- PIR1 Bits ----------------------------------------------------------//----- OPTION Bits --------------------------------------------------------//----- PIE1 Bits ----------------------------------------------------------//----- PCON Bits ----------------------------------------------------------//----- OSCCAL Bits --------------------------------------------------------//----- ADCON1 Bits --------------------------------------------------------//==========================================================================//// RAM Definition////==========================================================================// __MAXRAM H'FF'// __BADRAM H'06'-H'09', H'0D'-H'1D'// __BADRAM H'86'-H'89', H'8D', H'90'-H'9E', H'C0'-H'EF'//==========================================================================//// Configuration Bits////==========================================================================#define _MCLRE_ON 0x3FFF#define _MCLRE_OFF 0x3F7F#define _CP_ALL 0x009F#define _CP_75 0x15BF#define _CP_50 0x2ADF#define _CP_OFF 0x3FFF#define _PWRTE_OFF 0x3FFF#define _PWRTE_ON 0x3FEF#define _WDT_ON 0x3FFF#define _WDT_OFF 0x3FF7#define _LP_OSC 0x3FF8#define _XT_OSC 0x3FF9#define _HS_OSC 0x3FFA#define _INTRC_OSC 0x3FFC#define _INTRC_OSC_NOCLKOUT 0x3FFC#define _INTRC_OSC_CLKOUT 0x3FFD#define _EXTRC_OSC 0x3FFE#define _EXTRC_OSC_NOCLKOUT 0x3FFE#define _EXTRC_OSC_CLKOUT 0x3FFF// LIST// ----- ADCON0 bits --------------------typedef union { struct { unsigned char ADON:1; unsigned char :1; unsigned char GO:1; unsigned char CHS0:1; unsigned char CHS1:1; unsigned char :1; unsigned char ADCS0:1; unsigned char ADCS1:1; }; struct { unsigned char :1; unsigned char :1; unsigned char NOT_DONE:1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; }; struct { unsigned char :1; unsigned char :1; unsigned char GO_DONE:1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; };} __ADCON0_bits_t;extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;#define ADON ADCON0_bits.ADON#define GO ADCON0_bits.GO#define NOT_DONE ADCON0_bits.NOT_DONE#define GO_DONE ADCON0_bits.GO_DONE#define CHS0 ADCON0_bits.CHS0#define CHS1 ADCON0_bits.CHS1#define ADCS0 ADCON0_bits.ADCS0#define ADCS1 ADCON0_bits.ADCS1// ----- ADCON1 bits --------------------typedef union { struct { unsigned char PCFG0:1; unsigned char PCFG1:1; unsigned char PCFG2:1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; };} __ADCON1_bits_t;extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;#define PCFG0 ADCON1_bits.PCFG0#define PCFG1 ADCON1_bits.PCFG1#define PCFG2 ADCON1_bits.PCFG2// ----- INTCON bits --------------------typedef union { struct { unsigned char GPIF:1; unsigned char INTF:1; unsigned char T0IF:1; unsigned char GPIE:1; unsigned char INTE:1; unsigned char T0IE:1; unsigned char PEIE:1; unsigned char GIE:1; };} __INTCON_bits_t;extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;#define GPIF INTCON_bits.GPIF#define INTF INTCON_bits.INTF#define T0IF INTCON_bits.T0IF#define GPIE INTCON_bits.GPIE#define INTE INTCON_bits.INTE#define T0IE INTCON_bits.T0IE#define PEIE INTCON_bits.PEIE#define GIE INTCON_bits.GIE// ----- OPTION_REG bits --------------------typedef union { struct { unsigned char PS0:1; unsigned char PS1:1; unsigned char PS2:1; unsigned char PSA:1; unsigned char T0SE:1; unsigned char T0CS:1; unsigned char INTEDG:1; unsigned char NOT_GPPU:1; };} __OPTION_REG_bits_t;extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;#define PS0 OPTION_REG_bits.PS0#define PS1 OPTION_REG_bits.PS1#define PS2 OPTION_REG_bits.PS2#define PSA OPTION_REG_bits.PSA#define T0SE OPTION_REG_bits.T0SE#define T0CS OPTION_REG_bits.T0CS#define INTEDG OPTION_REG_bits.INTEDG#define NOT_GPPU OPTION_REG_bits.NOT_GPPU// ----- OSCCAL bits --------------------typedef union { struct { unsigned char :1; unsigned char :1; unsigned char CALSLW:1; unsigned char CALFST:1; unsigned char CAL0:1; unsigned char CAL1:1; unsigned char CAL2:1; unsigned char CAL3:1; };} __OSCCAL_bits_t;extern volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits;#define CALSLW OSCCAL_bits.CALSLW#define CALFST OSCCAL_bits.CALFST#define CAL0 OSCCAL_bits.CAL0#define CAL1 OSCCAL_bits.CAL1#define CAL2 OSCCAL_bits.CAL2#define CAL3 OSCCAL_bits.CAL3// ----- PCON bits --------------------typedef union { struct { unsigned char :1; unsigned char NOT_POR:1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; };} __PCON_bits_t;extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;#define NOT_POR PCON_bits.NOT_POR// ----- PIE1 bits --------------------typedef union { struct { unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char ADIE:1; unsigned char :1; };} __PIE1_bits_t;extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;#define ADIE PIE1_bits.ADIE// ----- PIR1 bits --------------------typedef union { struct { unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char ADIF:1; unsigned char :1; };} __PIR1_bits_t;extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;#define ADIF PIR1_bits.ADIF// ----- STATUS bits --------------------typedef union { struct { unsigned char C:1; unsigned char DC:1; unsigned char Z:1; unsigned char NOT_PD:1; unsigned char NOT_TO:1; unsigned char RP0:1; unsigned char RP1:1; unsigned char IRP:1; }; struct { unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; unsigned char LINRX:1; unsigned char LINTX:1; };} __STATUS_bits_t;extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;#define C STATUS_bits.C#define DC STATUS_bits.DC#define Z STATUS_bits.Z#define NOT_PD STATUS_bits.NOT_PD#define NOT_TO STATUS_bits.NOT_TO#define RP0 STATUS_bits.RP0#define RP1 STATUS_bits.RP1#define LINRX STATUS_bits.LINRX#define IRP STATUS_bits.IRP#define LINTX STATUS_bits.LINTX#endif
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