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📄 pic18f6680.h

📁 sdcc是为51等小型嵌入式cpu设计的c语言编译器支持数种不同类型的cpu
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		unsigned CIS:1;		unsigned C1INV:1;		unsigned C2INV:1;		unsigned C1OUT:1;		unsigned C2OUT:1;	};} __CMCONbits_t;extern volatile __CMCONbits_t __at (0xfb4) CMCONbits;extern __sfr __at (0xfb5) CVRCON;typedef union {	struct {		unsigned CVR0:1;		unsigned CVR1:1;		unsigned CVR2:1;		unsigned CVR3:1;		unsigned CVREF:1;		unsigned CVRR:1;		unsigned CVROE:1;		unsigned CVREN:1;	};} __CVRCONbits_t;extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits;extern __sfr __at (0xfb6) ECCPAS;typedef union {	struct {		unsigned PSSBD0:1;		unsigned PSSBD1:1;		unsigned PSSAC0:1;		unsigned PSSAC1:1;		unsigned ECCPAS0:1;		unsigned ECCPAS1:1;		unsigned ECCPAS2:1;		unsigned ECCPASE:1;	};} __ECCPASbits_t;extern volatile __ECCPASbits_t __at (0xfb6) ECCPASbits;extern __sfr __at (0xfb7) ECCP1DEL;typedef union {	struct {		unsigned EPDC0:1;		unsigned EPDC1:1;		unsigned EPDC2:1;		unsigned EPDC3:1;		unsigned EPDC4:1;		unsigned EPDC5:1;		unsigned EPDC6:1;		unsigned EPDC7:1;	};} __ECCP1DELbits_t;extern volatile __ECCP1DELbits_t __at (0xfb7) ECCP1DELbits;extern __sfr __at (0xfba) ECCP1CON;typedef union {	struct {		unsigned ECCP1M0:1;		unsigned ECCP1M1:1;		unsigned ECCP1M2:1;		unsigned ECCP1M3:1;		unsigned EDC1B0:1;		unsigned EDC1B1:1;		unsigned EPWM1M0:1;		unsigned EPWM1M1:1;	};} __ECCP1CONbits_t;extern volatile __ECCP1CONbits_t __at (0xfba) ECCP1CONbits;extern __sfr __at (0xfba) CCP2CON;typedef union {	struct {		unsigned CCP2M0:1;		unsigned CCP2M1:1;		unsigned CCP2M2:1;		unsigned CCP2M3:1;		unsigned DCCP2Y:1;		unsigned DCCP2X:1;		unsigned :1;		unsigned :1;	};} __CCP2CONbits_t;extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits;extern __sfr __at (0xfbb) ECCPR1L;extern __sfr __at (0xfbb) CCPR2L;extern __sfr __at (0xfbc) ECCPR1H;extern __sfr __at (0xfbc) CCPR2H;extern __sfr __at (0xfc0) ADCON2;typedef union {	struct {		unsigned ADCS0:1;		unsigned ADCS1:1;		unsigned ADCS2:1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned ADFM:1;	};} __ADCON2bits_t;extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits;extern __sfr __at (0xfc1) ADCON1;typedef union {	struct {		unsigned PCFG0:1;		unsigned PCFG1:1;		unsigned PCFG2:1;		unsigned PCFG3:1;		unsigned VCFG0:1;		unsigned VCFG1:1;		unsigned :1;		unsigned :1;	};} __ADCON1bits_t;extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits;extern __sfr __at (0xfc2) ADCON0;typedef union {	struct {		unsigned ADON:1;		unsigned GO:1;		unsigned CHS0:1;		unsigned CHS1:1;		unsigned CHS2:1;		unsigned CHS3:1;		unsigned :1;		unsigned :1;	};} __ADCON0bits_t;extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits;extern __sfr __at (0xfc3) ADRESL;extern __sfr __at (0xfc4) ADRESH;extern __sfr __at (0xfc5) SSPCON2;typedef union {	struct {		unsigned SEN:1;		unsigned RSEN:1;		unsigned PEN:1;		unsigned RCEN:1;		unsigned ACKEN:1;		unsigned ACKDT:1;		unsigned ACKSTAT:1;		unsigned GCEN:1;	};} __SSPCON2bits_t;extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits;extern __sfr __at (0xfc6) SSPCON1;typedef union {	struct {		unsigned SSPM0:1;		unsigned SSPM1:1;		unsigned SSPM2:1;		unsigned SSPM3:1;		unsigned CKP:1;		unsigned SSPEN:1;		unsigned SSPOV:1;		unsigned WCOL:1;	};} __SSPCON1bits_t;extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits;extern __sfr __at (0xfc7) SSPSTAT;typedef union {	struct {		unsigned BF:1;		unsigned UA:1;		unsigned R_W:1;		unsigned S:1;		unsigned P:1;		unsigned D_A:1;		unsigned CKE:1;		unsigned SMP:1;	};} __SSPSTATbits_t;extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits;extern __sfr __at (0xfc8) SSPADD;extern __sfr __at (0xfc9) SSPBUF;extern __sfr __at (0xfca) T2CON;typedef union {	struct {		unsigned T2CKPS0:1;		unsigned T2CKPS1:1;		unsigned TMR2ON:1;		unsigned TOUTPS0:1;		unsigned TOUTPS1:1;		unsigned TOUTPS2:1;		unsigned TOUTPS3:1;		unsigned :1;	};} __T2CONbits_t;extern volatile __T2CONbits_t __at (0xfca) T2CONbits;extern __sfr __at (0xfcb) PR2;extern __sfr __at (0xfcc) TMR2;extern __sfr __at (0xfcd) T1CON;typedef union {	struct {		unsigned TMR1ON:1;		unsigned TMR1CS:1;		unsigned NOT_T1SYNC:1;		unsigned T1OSCEN:1;		unsigned T1CKPS0:1;		unsigned T1CKPS1:1;		unsigned :1;		unsigned RD16:1;	};} __T1CONbits_t;extern volatile __T1CONbits_t __at (0xfcd) T1CONbits;extern __sfr __at (0xfce) TMR1L;extern __sfr __at (0xfcf) TMR1H;extern __sfr __at (0xfd0) RCON;typedef union {	struct {		unsigned BOR:1;		unsigned POR:1;		unsigned PD:1;		unsigned TO:1;		unsigned RI:1;		unsigned :1;		unsigned :1;		unsigned IPEN:1;	};} __RCONbits_t;extern volatile __RCONbits_t __at (0xfd0) RCONbits;extern __sfr __at (0xfd1) WDTCON;typedef union {	struct {		unsigned SWDTEN:1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;	};	struct {		unsigned SWDTE:1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;	};} __WDTCONbits_t;extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits;extern __sfr __at (0xfd2) LVDCON;typedef union {	struct {		unsigned LVDL0:1;		unsigned LVDL1:1;		unsigned LVDL2:1;		unsigned LVDL3:1;		unsigned LVDEN:1;		unsigned VRST:1;		unsigned :1;		unsigned :1;	};	struct {		unsigned LVV0:1;		unsigned LVV1:1;		unsigned LVV2:1;		unsigned LVV3:1;		unsigned :1;		unsigned BGST:1;		unsigned :1;		unsigned :1;	};} __LVDCONbits_t;extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits;extern __sfr __at (0xfd3) OSCCON;typedef union {	struct {		unsigned SCS:1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;		unsigned :1;	};} __OSCCONbits_t;extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits;extern __sfr __at (0xfd5) T0CON;extern __sfr __at (0xfd6) TMR0L;extern __sfr __at (0xfd7) TMR0H;extern __sfr __at (0xfd8) STATUS;typedef union {	struct {		unsigned C:1;		unsigned DC:1;		unsigned Z:1;		unsigned OV:1;		unsigned N:1;		unsigned :1;		unsigned :1;		unsigned :1;	};} __STATUSbits_t;extern volatile __STATUSbits_t __at (0xfd8) STATUSbits;extern __sfr __at (0xfd9) FSR2L;extern __sfr __at (0xfda) FSR2H;extern __sfr __at (0xfdb) PLUSW2;extern __sfr __at (0xfdc) PREINC2;extern __sfr __at (0xfdd) POSTDEC2;extern __sfr __at (0xfde) POSTINC2;extern __sfr __at (0xfdf) INDF2;extern __sfr __at (0xfe0) BSR;extern __sfr __at (0xfe1) FSR1L;extern __sfr __at (0xfe2) FSR1H;extern __sfr __at (0xfe3) PLUSW1;extern __sfr __at (0xfe4) PREINC1;extern __sfr __at (0xfe5) POSTDEC1;extern __sfr __at (0xfe6) POSTINC1;extern __sfr __at (0xfe7) INDF1;extern __sfr __at (0xfe8) WREG;extern __sfr __at (0xfe9) FSR0L;extern __sfr __at (0xfea) FSR0H;extern __sfr __at (0xfeb) PLUSW0;extern __sfr __at (0xfec) PREINC0;extern __sfr __at (0xfed) POSTDEC0;extern __sfr __at (0xfee) POSTINC0;extern __sfr __at (0xfef) INDF0;extern __sfr __at (0xff0) INTCON3;typedef union {	struct {		unsigned INT1F:1;		unsigned INT2F:1;		unsigned INT3F:1;		unsigned INT1E:1;		unsigned INT2E:1;		unsigned INT3E:1;		unsigned INT1P:1;		unsigned INT2P:1;	};	struct {		unsigned INT1IF:1;		unsigned INT2IF:1;		unsigned INT3IF:1;		unsigned INT1IE:1;		unsigned INT2IE:1;		unsigned INT3IE:1;		unsigned INT1IP:1;		unsigned INT2IP:1;	};} __INTCON3bits_t;extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits;extern __sfr __at (0xff1) INTCON2;typedef union {	struct {		unsigned RBIP:1;		unsigned INT3P:1;		unsigned T0IP:1;		unsigned INTEDG3:1;		unsigned INTEDG2:1;		unsigned INTEDG1:1;		unsigned INTEDG0:1;		unsigned RBPU:1;	};} __INTCON2bits_t;extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits;extern __sfr __at (0xff2) INTCON;typedef union {	struct {		unsigned RBIF:1;		unsigned INT0F:1;		unsigned T0IF:1;		unsigned RBIE:1;		unsigned INT0E:1;		unsigned T0IE:1;		unsigned PEIE:1;		unsigned GIE:1;	};} __INTCONbits_t;extern volatile __INTCONbits_t __at (0xff2) INTCONbits;extern __sfr __at (0xff3) PRODL;extern __sfr __at (0xff4) PRODH;extern __sfr __at (0xff5) TABLAT;extern __sfr __at (0xff6) TBLPTRL;extern __sfr __at (0xff7) TBLPTRH;extern __sfr __at (0xff8) TBLPTRU;extern __sfr __at (0xff9) PCL;extern __sfr __at (0xffa) PCLATH;extern __sfr __at (0xffb) PCLATU;extern __sfr __at (0xffc) STKPTR;typedef union {	struct {		unsigned STKPTR0:1;		unsigned STKPTR1:1;		unsigned STKPTR2:1;		unsigned STKPTR3:1;		unsigned STKPTR4:1;		unsigned :1;		unsigned STKUNF:1;		unsigned STKFUL:1;	};} __STKPTRbits_t;extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits;extern __sfr __at (0xffd) TOSL;extern __sfr __at (0xffe) TOSH;extern __sfr __at (0xfff) TOSU;/* Configuration registers locations */#define __CONFIG1H	0x300001#define __CONFIG2L	0x300002#define __CONFIG2H	0x300003#define __CONFIG3H	0x300005#define __CONFIG4L	0x300006#define __CONFIG5L	0x300008#define __CONFIG5H	0x300009#define __CONFIG6L	0x30000A#define __CONFIG6H	0x30000B#define __CONFIG7L	0x30000C#define __CONFIG7H	0x30000D/* Oscillator 1H options */#define _OSC_RC_CLKOUT_1H	0xFF	/* RC-CLKOUT on RA6 */#define _OSC_HS_SOFTWARE_1H	0xFE	/* HS-Software enabled PLL */#define _OSC_EC_CLKOUT_Software_nabld_PLL_1H	0xFD	/* EC-CLKOUT on RA6,Software_enabled_PLL */#define _OSC_EC_CLKOUT_PLL_enabld_frq_4xFosc1_1H	0xFC	/* EC-CLKOUT on RA6,PLL_enabled_freq_4xFosc1 */#define _OSC_EXT_Port_on_RA6_1H	0xF7	/* EXT RC-Port_on_RA6 */#define _OSC_HS_PLL_1H	0xF6	/* HS-PLL enabled freq=4xFosc1 */#define _OSC_EC_PORT_1H	0xF5	/* EC-Port on RA6 */#define _OSC_EC_CLKOUT__1H	0xF4	/* EC-CLKOUT on RA6 */#define _OSC_EXT_CLKOUT_on_RA6_1H	0xF3	/* EXT RC-CLKOUT_on_RA6 */#define _OSC_HS_1H	0xF2	/* HS */#define _OSC_XT_1H	0xF1	/* XT */#define _OSC_LP_1H	0xF0	/* LP *//* Low Power System Clock Timer1 Enable 1H options */#define _OSCSEN_ON_1H	0xDF	/* Enabled */#define _OSCSEN_OFF_1H	0xFF	/* Disabled *//* Power Up Timer 2L options */#define _PUT_OFF_2L	0xFF	/* Disabled */#define _PUT_ON_2L	0xFE	/* Enabled *//* Brown Out Detect 2L options */#define _BODEN_ON_2L	0xFF	/* Enabled */#define _BODEN_OFF_2L	0xFD	/* Disabled *//* Brown Out Voltage 2L options */#define _BODENV_2_0V_2L	0xFF	/* 2.0V */#define _BODENV_2_7V_2L	0xFB	/* 2.7V */#define _BODENV_4_2V_2L	0xF7	/* 4.2V */#define _BODENV_4_5V_2L	0xF3	/* 4.5V *//* Watchdog Timer 2H options */#define _WDT_ON_2H	0xFF	/* Enabled */#define _WDT_DISABLED_CONTROLLED_2H	0xFE	/* Disabled-Controlled by SWDTEN bit *//* Watchdog Postscaler 2H options */#define _WDTPS_1_32768_2H	0xFF	/* 1:32768 */#define _WDTPS_1_16384_2H	0xFD	/* 1:16384 */#define _WDTPS_1_8192_2H	0xFB	/* 1:8192 */#define _WDTPS_1_4096_2H	0xF9	/* 1:4096 */#define _WDTPS_1_2048_2H	0xF7	/* 1:2048 */#define _WDTPS_1_1024_2H	0xF5	/* 1:1024 */#define _WDTPS_1_512_2H	0xF3	/* 1:512 */#define _WDTPS_1_256_2H	0xF1	/* 1:256 */#define _WDTPS_1_128_2H	0xEF	/* 1:128 */#define _WDTPS_1_64_2H	0xED	/* 1:64 */#define _WDTPS_1_32_2H	0xEB	/* 1:32 */#define _WDTPS_1_16_2H	0xE9	/* 1:16 */#define _WDTPS_1_8_2H	0xE7	/* 1:8 */#define _WDTPS_1_4_2H	0xE5	/* 1:4 */#define _WDTPS_1_2_2H	0xE3	/* 1:2 */#define _WDTPS_1_1_2H	0xE1	/* 1:1 *//* CCP2 Mux 3H options */#define _CCP2MUX_RC1_3H	0xFF	/* RC1 */#define _CCP2MUX_RB3_3H	0xFE	/* RB3 *//* ECCP Mux 3H options */#define _ECCPMX_ECCP1_E6E3_3H	0xFF	/* ECCP1 and ECCP6 are muxed onto RE6 through RE3 */#define _ECCPMX_ECCP1_H7H4_3H	0xFD	/* ECCP1 and ECCP6 are muxed onto RH7 through RH4 *//* MCLR enable 3H options */#define _MCLRE_MCLR_Enabled_RE3_Disabled_3H	0xFF	/* MCLR Enabled_RE3_Disabled */#define _MCLRE_MCLR_Disabled_RE3_Enabled_3H	0x7F	/* MCLR Disabled__RE3_Enabled *//* Stack Overflow Reset 4L options */#define _STVR_ON_4L	0xFF	/* Enabled */#define _STVR_OFF_4L	0xFE	/* Disabled *//* Low Voltage Program 4L options */#define _LVP_ON_4L	0xFF	/* Enabled */#define _LVP_OFF_4L	0xFB	/* Disabled *//* Background Debug 4L options */#define _BACKBUG_OFF_4L	0xFF	/* Disabled */#define _BACKBUG_ON_4L	0x7F	/* Enabled *//* Code Protect 000800-0003FFF 5L options */#define _CP_0_OFF_5L	0xFF	/* Disabled */#define _CP_0_ON_5L	0xFE	/* Enabled *//* Code Protect 0004000-007FFF 5L options */#define _CP_1_OFF_5L	0xFF	/* Disabled */#define _CP_1_ON_5L	0xFD	/* Enabled *//* Code Protect 008000-00BFFF 5L options */#define _CP_2_OFF_5L	0xFF	/* Disabled */#define _CP_2_ON_5L	0xFB	/* Enabled *//* Code Protect 00C000F-00FFFF 5L options */#define _CP_3_OFF_5L	0xFF	/* Disabled */#define _CP_3_ON_5L	0xF7	/* Enabled *//* Data EE Read Protect 5H options */#define _CPD_OFF_5H	0xFF	/* Disabled */#define _CPD_ON_5H	0x7F	/* Enabled *//* Code Protect Boot 5H options */#define _CPB_OFF_5H	0xFF	/* Disabled */#define _CPB_ON_5H	0xBF	/* Enabled *//* Table Write Protect 00800-003FFF 6L options */#define _WRT_0_OFF_6L	0xFF	/* Disabled */#define _WRT_0_ON_6L	0xFE	/* Enabled *//* Table Write Protect 004000-007FFF 6L options */#define _WRT_1_OFF_6L	0xFF	/* Disabled */#define _WRT_1_ON_6L	0xFD	/* Enabled *//* Table Write Protect 08000-0BFFF 6L options */#define _WRT_2_OFF_6L	0xFF	/* Disabled */#define _WRT_2_ON_6L	0xFB	/* Enabled *//* Table Write Protect 0C000-0FFFF 6L options */#define _WRT_3_OFF_6L	0xFF	/* Disabled */#define _WRT_3_ON_6L	0xF7	/* Enabled *//* Data EE Write Protect 6H options */#define _WRTD_OFF_6H	0xFF	/* Disabled */#define _WRTD_ON_6H	0x7F	/* Enabled *//* Table Write Protect Boot 6H options */#define _WRTB_OFF_6H	0xFF	/* Disabled */#define _WRTB_ON_6H	0xBF	/* Enabled *//* Config. Write Protect 6H options */#define _WRTC_OFF_6H	0xFF	/* Disabled */#define _WRTC_ON_6H	0xDF	/* Enabled *//* Table Read Protect 00800-003FFF 7L options */#define _EBTR_0_OFF_7L	0xFF	/* Disabled */#define _EBTR_0_ON_7L	0xFE	/* Enabled *//* Table Read Protect 004000-07FFF 7L options */#define _EBTR_1_OFF_7L	0xFF	/* Disabled */#define _EBTR_1_ON_7L	0xFD	/* Enabled *//* Table Read Protect 08000-0BFFF 7L options */#define _EBTR_2_OFF_7L	0xFF	/* Disabled */#define _EBTR_2_ON_7L	0xFB	/* Enabled *//* Table Read Protect 0C000-0FFFF 7L options */#define _EBTR_3_OFF_7L	0xFF	/* Disabled */#define _EBTR_3_ON_7L	0xF7	/* Enabled *//* Table Read Protect Boot 7H options */#define _EBTRB_OFF_7H	0xFF	/* Disabled */#define _EBTRB_ON_7H	0xBF	/* Enabled *//* Device ID locations */#define __IDLOC0	0x200000#define __IDLOC1	0x200001#define __IDLOC2	0x200002#define __IDLOC3	0x200003#define __IDLOC4	0x200004#define __IDLOC5	0x200005#define __IDLOC6	0x200006#define __IDLOC7	0x200007#endif

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