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📄 mc68hc908gp32.h

📁 sdcc是为51等小型嵌入式cpu设计的c语言编译器支持数种不同类型的cpu
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	#define IMASKK ((struct __hc08_bits *)(&INTKBSCR))->bit1	#define MODEK  ((struct __hc08_bits *)(&INTKBSCR))->bit0	/*-- Bits 4-7 do not exist  */_VOLDATA _UINT8 __at 0x1b INTKBIER; /* Keyboard Interrupt Enable Register */  #define KBIE7  ((struct __hc08_bits *)(&INTKBIER))->bit7	#define KBIE6  ((struct __hc08_bits *)(&INTKBIER))->bit6	#define KBIE5  ((struct __hc08_bits *)(&INTKBIER))->bit5	#define KBIE4  ((struct __hc08_bits *)(&INTKBIER))->bit4	#define KBIE3  ((struct __hc08_bits *)(&INTKBIER))->bit3	#define KBIE2  ((struct __hc08_bits *)(&INTKBIER))->bit2	#define KBIE1  ((struct __hc08_bits *)(&INTKBIER))->bit1	#define KBIE0  ((struct __hc08_bits *)(&INTKBIER))->bit0_VOLDATA _UINT8 __at 0x1C TBCR;    /* Time Base Module Control */	#define TBIF   ((struct __hc08_bits *)(&TBCR))->bit7	#define TBR2   ((struct __hc08_bits *)(&TBCR))->bit6	#define TBR1   ((struct __hc08_bits *)(&TBCR))->bit5	#define TBR0   ((struct __hc08_bits *)(&TBCR))->bit4	#define TACK   ((struct __hc08_bits *)(&TBCR))->bit3	#define TBIE   ((struct __hc08_bits *)(&TBCR))->bit2	#define TBON   ((struct __hc08_bits *)(&TBCR))->bit1	/* Bit 0 Reserved */_VOLDATA _UINT8 __at 0x1D INTSCR;	/* IRQ status/control       */	#define IRQF1  ((struct __hc08_bits *)(&INTSCR))->bit3	#define ACK1   ((struct __hc08_bits *)(&INTSCR))->bit2	#define IMASK1 ((struct __hc08_bits *)(&INTSCR))->bit1	#define MODE1  ((struct __hc08_bits *)(&INTSCR))->bit0	/* Bits 4-7 unimplemented */_VOLDATA _UINT8 __at 0x1e CONFIG2; /* Configuration Register 2 *//* CONFIG2 is one-time writeble, so can't use bitfields  */_VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 *//* CONFIG1 is one-time writeable, so can't use bitfields */_VOLDATA _UINT8 __at 0x20 T1SC;     /* TIM 1 Status and Control */  #define PS0   ((struct __hc08_bits *)(&T1SC))->bit0  #define PS1   ((struct __hc08_bits *)(&T1SC))->bit1  #define PS2   ((struct __hc08_bits *)(&T1SC))->bit2  #define TRST  ((struct __hc08_bits *)(&T1SC))->bit4  #define TSTOP ((struct __hc08_bits *)(&T1SC))->bit5  #define TOIE  ((struct __hc08_bits *)(&T1SC))->bit6  #define TOF   ((struct __hc08_bits *)(&T1SC))->bit7_VOLDATA _UINT16 __at 0x21 T1CNT;    /* TIM1 Counter High & Low Registers */_VOLDATA _UINT8  __at 0x21  T1CNTH;  /* TIM1 Counter Register High */_VOLDATA _UINT8  __at 0x22  T1CNTL;  /* TIM1 Counter Register Low */_VOLDATA _UINT16 __at 0x23 T1MOD;    /* TIM1 Counter Modulo High & Low Registers */_VOLDATA _UINT8  __at 0x23 T1MODH;   /* TIM1 Counter Modulo Register High */_VOLDATA _UINT8  __at 0x24 T1MODL;   /* TIM1 Counter Modulo Register Low */_VOLDATA _UINT8 __at 0x25 T1SC0;    /* TIM1 Channel 0 Status and Control Register */  #define CH0MAX ((struct __hc08_bits *)(&T1SC0))->bit0  #define TOV0   ((struct __hc08_bits *)(&T1SC0))->bit1  #define ELS0A  ((struct __hc08_bits *)(&T1SC0))->bit2  #define ELS0B  ((struct __hc08_bits *)(&T1SC0))->bit3  #define MS0A   ((struct __hc08_bits *)(&T1SC0))->bit4  #define MS0B   ((struct __hc08_bits *)(&T1SC0))->bit5  #define CH0IE  ((struct __hc08_bits *)(&T1SC0))->bit6  #define CH0F   ((struct __hc08_bits *)(&T1SC0))->bit7_VOLDATA _UINT16 __at 0x26 T1CH0;   /* TIM1 Channel 0 High & Low Registers */_VOLDATA _UINT8 __at 0x26 T1CH0H;   /* TIM1 Channel 0 Register High */_VOLDATA _UINT8 __at 0x27 T1CH0L;   /* TIM1 Channel 0 Register Low */_VOLDATA _UINT8 __at 0x28 T1SC1;    /* TIM1 Channel 1 Status and Control Register */  #define CH1MAX ((struct __hc08_bits *)(&T1SC1))->bit0  #define TOV1   ((struct __hc08_bits *)(&T1SC1))->bit1  #define ELS1A  ((struct __hc08_bits *)(&T1SC1))->bit2  #define ELS1B  ((struct __hc08_bits *)(&T1SC1))->bit3  #define MS1A   ((struct __hc08_bits *)(&T1SC1))->bit4  #define CH1IE  ((struct __hc08_bits *)(&T1SC1))->bit6  #define CH1F   ((struct __hc08_bits *)(&T1SC1))->bit7_VOLDATA _UINT16 __at 0x29 T1CH1;    /* TIM1 Channel 1 High & Low Registers */_VOLDATA _UINT8  __at 0x29  T1CH1H;  /* TIM1 Channel 1 Register High */_VOLDATA _UINT8  __at 0x2A  T1CH1L;  /* TIM1 Channel 1 Register Low *//*------------------*//* TIM 2 REGISTERS  *//*------------------*/_VOLDATA _UINT8 __at 0x2B T2SC;     /* TIM 2 Status and Control */  #define PS0_2   ((struct __hc08_bits *)(&T2SC))->bit0  #define PS1_2   ((struct __hc08_bits *)(&T2SC))->bit1  #define PS2_2   ((struct __hc08_bits *)(&T2SC))->bit2  #define TRST_2  ((struct __hc08_bits *)(&T2SC))->bit4  #define TSTOP_2 ((struct __hc08_bits *)(&T2SC))->bit5  #define TOIE_2  ((struct __hc08_bits *)(&T2SC))->bit6  #define TOF_2   ((struct __hc08_bits *)(&T2SC))->bit7_VOLDATA _UINT16 __at 0x2C T2CNT;   /* TIM2 Counter High & Low Registers */_VOLDATA _UINT8  __at 0x2C T2CNTH;  /* TIM2 Counter Register High */_VOLDATA _UINT8  __at 0x2D T2CNTL;  /* TIM2 Counter Register Low */_VOLDATA _UINT16 __at 0x2E T2MOD;    /* TIM2 Counter Modulo High & Low Registers */_VOLDATA _UINT8  __at 0x2E T2MODH;   /* TIM2 Counter Modulo Register High */_VOLDATA _UINT8  __at 0x2F T2MODL;   /* TIM2 Counter Modulo Register Low */_VOLDATA _UINT8 __at 0x30 T2SC0;    /* TIM2 Channel 0 Status and Control Register */  #define CH0MAX_2 ((struct __hc08_bits *)(&T2SC0))->bit0  #define TOV0_2   ((struct __hc08_bits *)(&T2SC0))->bit1  #define ELS0A_2  ((struct __hc08_bits *)(&T2SC0))->bit2  #define ELS0B_2  ((struct __hc08_bits *)(&T2SC0))->bit3  #define MS0A_2   ((struct __hc08_bits *)(&T2SC0))->bit4  #define MS0B_2   ((struct __hc08_bits *)(&T2SC0))->bit5  #define CH0IE_2  ((struct __hc08_bits *)(&T2SC0))->bit6  #define CH0F_2   ((struct __hc08_bits *)(&T2SC0))->bit7_VOLDATA _UINT16 __at 0x31 T2CH0;    /* TIM2 Channel 0 High & Low Registers */_VOLDATA _UINT8  __at 0x31 T2CH0H;   /* TIM2 Channel 0 Register High */_VOLDATA _UINT8  __at 0x32 T2CH0L;   /* TIM2 Channel 0 Register Low */_VOLDATA _UINT8 __at 0x33 T2SC1;    /* TIM2 Channel 1 Status and Control Register */  #define CH1MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0  #define TOV1_2   ((struct __hc08_bits *)(&T2SC1))->bit1  #define ELS1A_2  ((struct __hc08_bits *)(&T2SC1))->bit2  #define ELS1B_2  ((struct __hc08_bits *)(&T2SC1))->bit3  #define MS1A_2   ((struct __hc08_bits *)(&T2SC1))->bit4  #define CH1IE_2  ((struct __hc08_bits *)(&T2SC1))->bit6  #define CH1F_2   ((struct __hc08_bits *)(&T2SC1))->bit7_VOLDATA _UINT16 __at 0x34  T2CH1;   /* TIM2 Channel 1 High & Low Registers */_VOLDATA _UINT8  __at 0x34  T2CH1H;  /* TIM2 Channel 1 Register High */_VOLDATA _UINT8  __at 0x35  T2CH1L;  /* TIM2 Channel 1 Register Low */_VOLDATA _UINT8 __at 0x36 PCTL;  /* PLL Control Register */	#define PLLIE ((struct __hc08_bits *)(&PCTL))->bit7	#define PLLF  ((struct __hc08_bits *)(&PCTL))->bit6	#define PLLON ((struct __hc08_bits *)(&PCTL))->bit5	#define BCS   ((struct __hc08_bits *)(&PCTL))->bit4	#define PRE1  ((struct __hc08_bits *)(&PCTL))->bit3	#define PRE0  ((struct __hc08_bits *)(&PCTL))->bit2	#define VPR1  ((struct __hc08_bits *)(&PCTL))->bit1	#define VPR0  ((struct __hc08_bits *)(&PCTL))->bit0_VOLDATA	_UINT8 __at 0x37 PBWC;  /* PLL Bandwidth Control Register */	#define AUTO ((struct __hc08_bits *)(&PBWC))->bit7	#define LOCK ((struct __hc08_bits *)(&PBWC))->bit6	#define ACQ  ((struct __hc08_bits *)(&PBWC))->bit5	/* Bits 1-4, Unimplemented */	/* Bit 0, Reserved         */_VOLDATA _UINT8 __at 0x38 PMSH;  /* PLL Multiplier Select High */	#define MUL11 ((struct __hc08_bits *)(&PMSH))->bit3	#define MUL10 ((struct __hc08_bits *)(&PMSH))->bit2	#define MUL9  ((struct __hc08_bits *)(&PMSH))->bit1	#define MUL8  ((struct __hc08_bits *)(&PMSH))->bit0	/* Bits 4-7 unimplemented */_VOLDATA _UINT8 __at 0x39 PMSL;  /* PLL Multiplir Select Low */	#define MUL7 ((struct __hc08_bits *)(&PMSL))->bit7	#define MUL6 ((struct __hc08_bits *)(&PMSL))->bit6	#define MUL5 ((struct __hc08_bits *)(&PMSL))->bit5	#define MUL4 ((struct __hc08_bits *)(&PMSL))->bit4	#define MUL3 ((struct __hc08_bits *)(&PMSL))->bit3	#define MUL2 ((struct __hc08_bits *)(&PMSL))->bit2	#define MUL1 ((struct __hc08_bits *)(&PMSL))->bit1	#define MUL0 ((struct __hc08_bits *)(&PMSL))->bit0_VOLDATA _UINT8 __at 0x3a PMRS;  /* PLL VCO Select Range  */	#define VRS7 ((struct __hc08_bits *)(&PMRS))->bit7	#define VRS6 ((struct __hc08_bits *)(&PMRS))->bit6	#define VRS5 ((struct __hc08_bits *)(&PMRS))->bit5	#define VRS4 ((struct __hc08_bits *)(&PMRS))->bit4	#define VRS3 ((struct __hc08_bits *)(&PMRS))->bit3	#define VRS2 ((struct __hc08_bits *)(&PMRS))->bit2	#define VRS1 ((struct __hc08_bits *)(&PMRS))->bit1	#define VRS0 ((struct __hc08_bits *)(&PMRS))->bit0_VOLDATA _UINT8 __at 0x3b PMDS;  /* PLL Reference Divider Select Register */	#define RDS3 ((struct __hc08_bits *)(&PMDS))->bit3	#define RDS2 ((struct __hc08_bits *)(&PMDS))->bit2	#define RDS1 ((struct __hc08_bits *)(&PMDS))->bit1	#define RDS0 ((struct __hc08_bits *)(&PMDS))->bit0	/* Bits 4-7 unimplemented */_VOLDATA _UINT8 __at 0x3c ADSCR; /* Analog-to-Digital Status and Control Reg. */	#define COCO  ((struct __hc08_bits *)(&ADSCR))->bit7	#define AIEN  ((struct __hc08_bits *)(&ADSCR))->bit6	#define ADCO  ((struct __hc08_bits *)(&ADSCR))->bit5	#define ADCH4 ((struct __hc08_bits *)(&ADSCR))->bit4	#define ADCH3 ((struct __hc08_bits *)(&ADSCR))->bit3	#define ADCH2 ((struct __hc08_bits *)(&ADSCR))->bit2	#define ADCH1 ((struct __hc08_bits *)(&ADSCR))->bit1	#define ADCH0 ((struct __hc08_bits *)(&ADSCR))->bit0_VOLDATA _UINT8 __at 0x3d ADR;   /* Analog-to-Digital Data Register  */_VOLDATA _UINT8 __at 0x3e ADCLK; /* Analog-to-Digital Clock */	#define ADIV2  ((struct __hc08_bits *)(&ADCLK))->bit7	#define ADIV1  ((struct __hc08_bits *)(&ADCLK))->bit6	#define ADIV0  ((struct __hc08_bits *)(&ADCLK))->bit5	#define ADICLK ((struct __hc08_bits *)(&ADCLK))->bit4	/* Bits 0-3 unimplemented */_VOLXDATA _UINT8 __at 0xfe00 SBSR;     /* SIM Break Status Register */  #define SBSW ((struct __hc08_bits *)(&SBSR))->bit1_VOLXDATA _UINT8 __at 0xfe01 SRSR;    /* SIM Reset Status Register */  #define LVI    ((struct __hc08_bits *)(&SRSR))->bit1  #define MODRST ((struct __hc08_bits *)(&SRSR))->bit2  #define ILAD   ((struct __hc08_bits *)(&SRSR))->bit3  #define ILOP   ((struct __hc08_bits *)(&SRSR))->bit4  #define COP    ((struct __hc08_bits *)(&SRSR))->bit5  #define PIN    ((struct __hc08_bits *)(&SRSR))->bit6  #define POR    ((struct __hc08_bits *)(&SRSR))->bit7  /* Bit 0 unimplemented */_VOLXDATA _UINT8 __at 0xfe02 SUBAR;  /* SIM Upper Byte Address */_VOLXDATA _UINT8 __at 0xfe03 SBFCR;    /* SIM Break Flag Control Register */  #define BFCE ((struct __hc08_bits *)(&BFCR))->bit7_VOLXDATA _UINT8 __at 0xfe04 INT1;    /* Interrupt Status Register 1 */  #define IF1 ((struct __hc08_bits *)(&INT1))->bit2  #define IF2 ((struct __hc08_bits *)(&INT1))->bit3  #define IF3 ((struct __hc08_bits *)(&INT1))->bit4  #define IF4 ((struct __hc08_bits *)(&INT1))->bit5  #define IF5 ((struct __hc08_bits *)(&INT1))->bit6  #define IF6 ((struct __hc08_bits *)(&INT1))->bit7	/* Bits 0-1 Reserved */_VOLXDATA _UINT8 __at 0xfe05 INT2;  /* Interrupt Status Register 2 */  #define IF14 ((struct __hc08_bits *)(&INT2))->bit7	#define IF13 ((struct __hc08_bits *)(&INT2))->bit6	#define IF12 ((struct __hc08_bits *)(&INT2))->bit5	#define IF11 ((struct __hc08_bits *)(&INT2))->bit4	#define IF10 ((struct __hc08_bits *)(&INT2))->bit3	#define IF9 ((struct __hc08_bits *)(&INT2))->bit2	#define IF8 ((struct __hc08_bits *)(&INT2))->bit1	#define IF7 ((struct __hc08_bits *)(&INT2))->bit0_VOLXDATA _UINT8 __at 0xfe06 INT3;  /* Interrupt Status Register 3 */  #define IF16 ((struct __hc08_bits *)(&INT3))->bit1	#define IF15 ((struct __hc08_bits *)(&INT3))->bit0_VOLXDATA _UINT8 __at 0xfe07 FLCTR;  /* Flash test/programming */_VOLXDATA _UINT8 __at 0xfe08 FLCR;    /* FLASH Control Register */  #define PGM   ((struct __hc08_bits *)(&FLCR))->bit0  #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1  #define MASS  ((struct __hc08_bits *)(&FLCR))->bit2  #define HVEN  ((struct __hc08_bits *)(&FLCR))->bit3_VOLXDATA _UINT16 __at 0xfe09 BRK;    /* Break Address High & Low Registers */_VOLXDATA _UINT8 __at 0xfe09 BRKH;    /* Break Address High Register */_VOLXDATA _UINT8 __at 0xfe0a BRKL;    /* Break Address Low Register */_VOLXDATA _UINT8 __at 0xfe0b BRKSCR;  /* Break Status and Control Register */  #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6  #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7_VOLXDATA _UINT8 __at 0xfe0c LVISR;   /* Low voltage detect */	#define LVIOUT ((struct __hc08_bits *)(&LVISR))->bit7_VOLXDATA _UINT8 __at 0xfe7e FLBPR;    /* FLASH Block Protect Register */  #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0  #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1  #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2  #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3  #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4  #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5  #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6  #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7_VOLXDATA _UINT8 __at 0xffff COPCTL;  /* COP Control Register */#endif

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