mc68hc908jkjl.h

sdcc是为51等小型嵌入式cpu设计的c语言编译器支持数种不同类型的cpu

        #define SCR1  ((struct __hc08_bits *)(&SCBR))->bit1
        #define SCR0  ((struct __hc08_bits *)(&SCBR))->bit0
	/*-- Bits 6 and 7 do not exist */

		
_VOLDATA _UINT8 __at 0x1a KBSCR; /* Keyboard Status and Control Register */
	#define MODEK  ((struct __hc08_bits *)(&KBSCR))->bit0
	#define IMASKK ((struct __hc08_bits *)(&KBSCR))->bit1
	#define ACKK   ((struct __hc08_bits *)(&KBSCR))->bit2
	#define KEYF   ((struct __hc08_bits *)(&KBSCR))->bit3
	/*-- Bits 4-7 do not exist  */
		
_VOLDATA _UINT8 __at 0x1b KBIER; /* Keyboard Interrupt Enable Register */
	#define KBIE0  ((struct __hc08_bits *)(&KBIER))->bit0
	#define KBIE1  ((struct __hc08_bits *)(&KBIER))->bit1
	#define KBIE3  ((struct __hc08_bits *)(&KBIER))->bit3
	#define KBIE2  ((struct __hc08_bits *)(&KBIER))->bit2
	#define KBIE4  ((struct __hc08_bits *)(&KBIER))->bit4
	#define KBIE5  ((struct __hc08_bits *)(&KBIER))->bit5
	#define KBIE6  ((struct __hc08_bits *)(&KBIER))->bit6
	#define KBIE7  ((struct __hc08_bits *)(&KBIER))->bit7
		
_VOLDATA _UINT8 __at 0x1D INTSCR;	/* IRQ status/control       */
	#define IRQF1  ((struct __hc08_bits *)(&INTSCR))->bit3
	#define ACK1   ((struct __hc08_bits *)(&INTSCR))->bit2
	#define IMASK1 ((struct __hc08_bits *)(&INTSCR))->bit1
	#define MODE1  ((struct __hc08_bits *)(&INTSCR))->bit0
	/* Bits 4-7 unimplemented */
	
_VOLDATA _UINT8 __at 0x1e CONFIG2; /* Configuration Register 2 */
/* CONFIG2 is one-time writeble, so can't use bitfields  */	
	
_VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 */
/* CONFIG1 is one-time writeable, so can't use bitfields */	
	
_VOLDATA _UINT8 __at 0x20 T1SC;     /* TIM 1 Status and Control */
  #define PS0   ((struct __hc08_bits *)(&T1SC))->bit0
  #define PS1   ((struct __hc08_bits *)(&T1SC))->bit1
  #define PS2   ((struct __hc08_bits *)(&T1SC))->bit2
  #define TRST  ((struct __hc08_bits *)(&T1SC))->bit4
  #define TSTOP ((struct __hc08_bits *)(&T1SC))->bit5
  #define TOIE  ((struct __hc08_bits *)(&T1SC))->bit6
  #define TOF   ((struct __hc08_bits *)(&T1SC))->bit7	

_VOLDATA _UINT16 __at 0x21 T1CNT;    /* TIM1 Counter High & Low Registers */
_VOLDATA _UINT8  __at 0x21  T1CNTH;  /* TIM1 Counter Register High */
_VOLDATA _UINT8  __at 0x22  T1CNTL;  /* TIM1 Counter Register Low */

_VOLDATA _UINT16 __at 0x23 T1MOD;    /* TIM1 Counter Modulo High & Low Registers */
_VOLDATA _UINT8  __at 0x23 T1MODH;   /* TIM1 Counter Modulo Register High */
_VOLDATA _UINT8  __at 0x24 T1MODL;   /* TIM1 Counter Modulo Register Low */

_VOLDATA _UINT8 __at 0x25 T1SC0;    /* TIM1 Channel 0 Status and Control Register */
  #define CH0MAX ((struct __hc08_bits *)(&T1SC0))->bit0
  #define TOV0   ((struct __hc08_bits *)(&T1SC0))->bit1
  #define ELS0A  ((struct __hc08_bits *)(&T1SC0))->bit2
  #define ELS0B  ((struct __hc08_bits *)(&T1SC0))->bit3
  #define MS0A   ((struct __hc08_bits *)(&T1SC0))->bit4
  #define MS0B   ((struct __hc08_bits *)(&T1SC0))->bit5
  #define CH0IE  ((struct __hc08_bits *)(&T1SC0))->bit6
  #define CH0F   ((struct __hc08_bits *)(&T1SC0))->bit7
		
_VOLDATA _UINT16 __at 0x26 T1CH0;   /* TIM1 Channel 0 High & Low Registers */
_VOLDATA _UINT8 __at 0x26 T1CH0H;   /* TIM1 Channel 0 Register High */
_VOLDATA _UINT8 __at 0x27 T1CH0L;   /* TIM1 Channel 0 Register Low */

_VOLDATA _UINT8 __at 0x28 T1SC1;    /* TIM1 Channel 1 Status and Control Register */
  #define CH1MAX ((struct __hc08_bits *)(&T1SC1))->bit0
  #define TOV1   ((struct __hc08_bits *)(&T1SC1))->bit1
  #define ELS1A  ((struct __hc08_bits *)(&T1SC1))->bit2
  #define ELS1B  ((struct __hc08_bits *)(&T1SC1))->bit3
  #define MS1A   ((struct __hc08_bits *)(&T1SC1))->bit4
  #define CH1IE  ((struct __hc08_bits *)(&T1SC1))->bit6
  #define CH1F   ((struct __hc08_bits *)(&T1SC1))->bit7

_VOLDATA _UINT16 __at 0x29 T1CH1;    /* TIM1 Channel 1 High & Low Registers */
_VOLDATA _UINT8  __at 0x29  T1CH1H;  /* TIM1 Channel 1 Register High */
_VOLDATA _UINT8  __at 0x2A  T1CH1L;  /* TIM1 Channel 1 Register Low */

_VOLDATA _UINT8 __at 0x30 T2SC;    /* TIM2 Status and Control Register */
  #define PS0_2 	((struct __hc08_bits *)(&T2SC))->bit0
  #define PS1_2 	((struct __hc08_bits *)(&T2SC0))->bit1
  #define PS2_2 	((struct __hc08_bits *)(&T2SC0))->bit2
  #define TRST_2 	((struct __hc08_bits *)(&T2SC0))->bit4
  #define TSTOP_2    ((struct __hc08_bits *)(&T2SC0))->bit5
  #define TOIE_2     ((struct __hc08_bits *)(&T2SC0))->bit6
  #define TOF_2		((struct __hc08_bits *)(&T2SC0))->bit7	
	
_VOLDATA _UINT16 __at 0x31 T2CNT;    /* TIM2 Counter Registers */
_VOLDATA _UINT8  __at 0x31 T2CNTH;   /* TIM2 Counter Register High */
_VOLDATA _UINT8  __at 0x32 T2CNTL;   /* TIM2 Counter Register Low */	

	
_VOLDATA _UINT16 __at 0x33 T2MOD;    /* TIM2 Counter Modulo Registers */
_VOLDATA _UINT8  __at 0x33 T2MODH;   /* TIM2 Counter Modulo Register High */
_VOLDATA _UINT8  __at 0x34 T2MODL;   /* TIM2 Counter Modulo Register Low */	

	
_VOLDATA _UINT8 __at 0x35 T2SC1;    /* TIM2 Channel 0 Status and Control Register */
  #define CH0MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0
  #define TOV0_2   ((struct __hc08_bits *)(&T2SC1))->bit1
  #define ELS0A_2  ((struct __hc08_bits *)(&T2SC1))->bit2
  #define ELS0B_2  ((struct __hc08_bits *)(&T2SC1))->bit3
  #define MS0A_2   ((struct __hc08_bits *)(&T2SC1))->bit4
  #define CH0IE_2  ((struct __hc08_bits *)(&T2SC1))->bit6
  #define CH0F_2   ((struct __hc08_bits *)(&T2SC1))->bit7

_VOLDATA _UINT16 __at 0x36 T2CH0;    /* TIM2 Channel 0 High & Low Registers */
_VOLDATA _UINT8  __at 0x36 T2CH0H;   /* TIM2 Channel 0 Register High */
_VOLDATA _UINT8  __at 0x37 T2CH0L;   /* TIM2 Channel 0 Register Low */	

_VOLDATA _UINT8 __at 0x38 T2SC1;    /* TIM2 Channel 1 Status and Control Register */
  #define CH1MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0
  #define TOV1_2   ((struct __hc08_bits *)(&T2SC1))->bit1
  #define ELS1A_2  ((struct __hc08_bits *)(&T2SC1))->bit2
  #define ELS1B_2  ((struct __hc08_bits *)(&T2SC1))->bit3
  #define MS1A_2   ((struct __hc08_bits *)(&T2SC1))->bit4
  #define CH1IE_2  ((struct __hc08_bits *)(&T2SC1))->bit6
  #define CH1F_2   ((struct __hc08_bits *)(&T2SC1))->bit7

_VOLDATA _UINT16 __at 0x39  T2CH1;   /* TIM2 Channel 1 High & Low Registers */
_VOLDATA _UINT8  __at 0x39  T2CH1H;  /* TIM2 Channel 1 Register High */
_VOLDATA _UINT8  __at 0x3a  T2CH1L;  /* TIM2 Channel 1 Register Low */	


_VOLDATA _UINT8 __at 0x3c ADSCR; /* Analog-to-Digital Status and Control Reg. */
	#define COCO  ((struct __hc08_bits *)(&ADSCR))->bit7
	#define AIEN  ((struct __hc08_bits *)(&ADSCR))->bit6
	#define ADCO  ((struct __hc08_bits *)(&ADSCR))->bit5
	#define ADCH4 ((struct __hc08_bits *)(&ADSCR))->bit4
	#define ADCH3 ((struct __hc08_bits *)(&ADSCR))->bit3
	#define ADCH2 ((struct __hc08_bits *)(&ADSCR))->bit2
	#define ADCH1 ((struct __hc08_bits *)(&ADSCR))->bit1
	#define ADCH0 ((struct __hc08_bits *)(&ADSCR))->bit0
	
_VOLDATA _UINT8 __at 0x3d ADR;   /* Analog-to-Digital Data Register  */
	
_VOLDATA _UINT8 __at 0x3e ADCLK; /* Analog-to-Digital Clock */
	#define ADIV2  ((struct __hc08_bits *)(&ADCLK))->bit7
	#define ADIV1  ((struct __hc08_bits *)(&ADCLK))->bit6
	#define ADIV0  ((struct __hc08_bits *)(&ADCLK))->bit5
	/* Bits 0-4 unimplemented */

_VOLXDATA _UINT8 __at 0xfe00 BSR;     /* SIM Break Status Register */
  #define SBSW ((struct __hc08_bits *)(&BSR))->bit1

_VOLXDATA _UINT8 __at 0xfe01 RSR;    /* SIM Reset Status Register */
  #define LVI    ((struct __hc08_bits *)(&RSR))->bit1
  #define MODRST ((struct __hc08_bits *)(&RSR))->bit2
  #define ILAD   ((struct __hc08_bits *)(&RSR))->bit3
  #define ILOP   ((struct __hc08_bits *)(&RSR))->bit4
  #define COP    ((struct __hc08_bits *)(&RSR))->bit5
  #define PIN    ((struct __hc08_bits *)(&RSR))->bit6
  #define POR    ((struct __hc08_bits *)(&RSR))->bit7
  /* Bit 0 unimplemented */

_VOLXDATA _UINT8 __at 0xfe02 SUBAR;  /* SIM Upper Byte Address */
	
_VOLXDATA _UINT8 __at 0xfe03 BFCR;    /* SIM Break Flag Control Register */
  #define BFCE ((struct __hc08_bits *)(&BFCR))->bit7

_VOLXDATA _UINT8 __at 0xfe04 INT1;    /* Interrupt Status Register 1 */
  #define IF1 ((struct __hc08_bits *)(&INT1))->bit2
  #define IF3 ((struct __hc08_bits *)(&INT1))->bit4
  #define IF4 ((struct __hc08_bits *)(&INT1))->bit5
  #define IF5 ((struct __hc08_bits *)(&INT1))->bit6
	
	
_VOLXDATA _UINT8 __at 0xfe05 INT2;  /* Interrupt Status Register 2 */
  	#define IF14 ((struct __hc08_bits *)(&INT2))->bit7
		
_VOLXDATA _UINT8 __at 0xfe06 INT3;  /* Interrupt Status Register 3 */
  #define IF16 ((struct __hc08_bits *)(&INT3))->bit1	
	#define IF15 ((struct __hc08_bits *)(&INT3))->bit0	
		
_VOLXDATA _UINT8 __at 0xfe08 FLCR;    /* FLASH Control Register */
  #define PGM   ((struct __hc08_bits *)(&FLCR))->bit0
  #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1
  #define MASS  ((struct __hc08_bits *)(&FLCR))->bit2
  #define HVEN  ((struct __hc08_bits *)(&FLCR))->bit3
		
_VOLXDATA _UINT8 __at 0xfe09 FLBPR;    /* Flash Block Protect Register */
  #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0
  #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1
  #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2
  #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3
  #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4
  #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5
  #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6
  #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7

_VOLXDATA _UINT16 __at 0xfe0C BRK;    /* Break Address High & Low Registers */
_VOLXDATA _UINT8 __at 0xfe0C BRKH;    /* Break Address High Register */
_VOLXDATA _UINT8 __at 0xfe0D BRKL;    /* Break Address Low Register */	

_VOLXDATA _UINT8 __at 0xfe0e BRKSCR;  /* Break Status and Control Register */
  #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6
  #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7	
	
_VOLXDATA _UINT8 __at 0xffff COPCTL;  /* COP Control Register */

#endif