apifunctions.c

本压缩包为作者截取的PCI9054的WDM官方驱动源码。欢迎下载。

            PLX_PCI_REG_WRITE(
                pdx,
                PCI9054_PM_CSR,
                RegisterValue
                );
        }
    }

    // Hot Swap Interrupt
    if (pPlxIntr->Enum)
    {
        // Verify that the capability is enabled
        if (PlxIsNewCapabilityEnabled(
                pdx,
                CAPABILITY_HOT_SWAP
                ) == TRUE)
        {
            PLX_PCI_REG_READ(
                pdx,
                PCI9054_HS_CAP_ID,
                &RegisterValue
                );

            // Turn off INS & EXT bits so we don't clear them
            RegisterValue &= ~((1 << 23) | (1 << 22));

            // Enable Enum Interrupt mask
            RegisterValue |= (1 << 17);

            PLX_PCI_REG_WRITE(
                pdx,
                PCI9054_HS_CAP_ID,
                RegisterValue
                );
        }
    }

    return ApiSuccess;
}




/******************************************************************************
 *
 * Function   :  PlxPciIntrStatusGet
 *
 * Description:  Returns the last interrupts to occur on this device
 *
 ******************************************************************************/
RETURN_CODE
PlxPciIntrStatusGet(
    DEVICE_EXTENSION *pdx,
    PLX_INTR         *pPlxIntr
    )
{
    RtlZeroMemory(
        pPlxIntr,
        sizeof(PLX_INTR)
        );

    if (pdx->InterruptSource & INTR_TYPE_LOCAL_1)
    {
        pPlxIntr->IopToPciInt = 1;
    }

    if (pdx->InterruptSource & INTR_TYPE_DOORBELL)
    {
        pPlxIntr->PciDoorbell = 1;
    }

    if (pdx->InterruptSource & INTR_TYPE_PCI_ABORT)
    {
        pPlxIntr->PciAbort = 1;
    }

    if (pdx->InterruptSource & INTR_TYPE_DMA_0)
    {
        pPlxIntr->PciDmaChannel0 = 1;
    }

    if (pdx->InterruptSource & INTR_TYPE_DMA_1)
    {
        pPlxIntr->PciDmaChannel1 = 1;
    }

    if (pdx->InterruptSource & INTR_TYPE_OUTBOUND_POST)
    {
        pPlxIntr->OutboundPost = 1;
    }

    return ApiSuccess;
}




/******************************************************************************
 *
 * Function   :  PlxPciPowerLevelSet
 *
 * Description:  Set the Power level
 *
 ******************************************************************************/
RETURN_CODE
PlxPciPowerLevelSet(
    DEVICE_EXTENSION *pdx,
    PLX_POWER_LEVEL   PowerLevel
    )
{
    U32 RegisterValue;


    // Check if we support the power state
    if (PlxIsPowerLevelSupported(
            pdx,
            PowerLevel
            ) == FALSE)
    {
        return ApiInvalidPowerState;
    }

    // Get the power state
    PLX_PCI_REG_READ(
        pdx,
        PCI9054_PM_CSR,
        &RegisterValue
        );

    // Update the power state
    RegisterValue = (RegisterValue & ~0x3) | (PowerLevel - D0);

    // Set the new power state
    PLX_PCI_REG_WRITE(
        pdx,
        PCI9054_PM_CSR,
        RegisterValue
        );

    return ApiSuccess;
}




/******************************************************************************
 *
 * Function   :  PlxPciPowerLevelGet
 *
 * Description:  Get the Power Level
 *
 ******************************************************************************/
RETURN_CODE
PlxPciPowerLevelGet(
    DEVICE_EXTENSION *pdx,
    PLX_POWER_LEVEL  *pPowerLevel
    )
{
    U32 RegisterValue;


    // Check if New capabilities are enabled
    if (PlxIsNewCapabilityEnabled(
            pdx,
            CAPABILITY_POWER_MANAGEMENT
            ) == FALSE)
    {
        *pPowerLevel = D0;
        return ApiInvalidPowerState;
    }

    // Get power state
    PLX_PCI_REG_READ(
        pdx,
        PCI9054_PM_CSR,
        &RegisterValue
        );

    *pPowerLevel = (PLX_POWER_LEVEL)((RegisterValue & 0x3) + D0);

    return ApiSuccess;
}




/******************************************************************************
 *
 * Function   :  PlxPciPmNcpRead
 *
 * Description:  Read the Power Management Next Capabilities Pointer
 *
 ******************************************************************************/
RETURN_CODE
PlxPciPmNcpRead(
    DEVICE_EXTENSION *pdx,
    U8               *pValue
    )
{
    U32 RegisterValue;


    // Check if New capabilities are enabled
    if (PlxIsNewCapabilityEnabled(
            pdx,
            CAPABILITY_POWER_MANAGEMENT
            ) == FALSE)
    {
        *pValue = (U8)-1;
        return ApiPMNotSupported;
    }

    PLX_PCI_REG_READ(
        pdx,
        PCI9054_PM_CAP_ID,
        &RegisterValue
        );

    *pValue = (U8)((RegisterValue >> 8) & 0xFF);

    return ApiSuccess;
}




/******************************************************************************
 *
 * Function   :  PlxPciHotSwapNcpRead
 *
 * Description:  Read the HotSwap Next Capabilities Pointer
 *
 ******************************************************************************/
RETURN_CODE
PlxPciHotSwapNcpRead(
    DEVICE_EXTENSION *pdx,
    U8               *pValue
    )
{
    U32 RegisterValue;


    // Check if New capabilities are enabled
    if (PlxIsNewCapabilityEnabled(
            pdx,
            CAPABILITY_HOT_SWAP
            ) == FALSE)
    {
        *pValue = (U8)-1;
        return ApiHSNotSupported;
    }

    PLX_PCI_REG_READ(
        pdx,
        PCI9054_HS_CAP_ID,
        &RegisterValue
        );

    *pValue = (U8)((RegisterValue >> 8) & 0xFF);

    return ApiSuccess;
}




/******************************************************************************
 *
 * Function   :  PlxPciHotSwapStatus
 *
 * Description:  Read the HotSwap status register
 *
 ******************************************************************************/
RETURN_CODE
PlxPciHotSwapStatus(
    DEVICE_EXTENSION *pdx,
    U8               *pValue
    )
{
    U32 RegisterValue;


    // Check if New capabilities are enabled
    if (PlxIsNewCapabilityEnabled(
            pdx,
            CAPABILITY_HOT_SWAP
            ) == FALSE)
    {
        *pValue = (U8)-1;
        return ApiHSNotSupported;
    }

    PLX_PCI_REG_READ(
        pdx,
        PCI9054_HS_CAP_ID,
        &RegisterValue
        );

    // Clear bits other than status
    RegisterValue  = RegisterValue >> 16;
    RegisterValue &= (HS_LED_ON | HS_BOARD_REMOVED | HS_BOARD_INSERTED);

    *pValue = (U8)RegisterValue;

    return ApiSuccess;
}




/******************************************************************************
 *
 * Function   :  PlxPciVpdNcpRead
 *
 * Description:  Read the Vital Product Data Next Capabilities Pointer
 *
 ******************************************************************************/
RETURN_CODE
PlxPciVpdNcpRead(
    DEVICE_EXTENSION *pdx,
    U8               *pValue
    )
{
    U32 RegisterValue;


    // Check if New capabilities are enabled
    if (PlxIsNewCapabilityEnabled(
            pdx,
            CAPABILITY_VPD
            ) == FALSE)
    {
        *pValue = (U8)-1;
        return ApiVpdNotEnabled;
    }

    PLX_PCI_REG_READ(
        pdx,
        PCI9054_VPD_CAP_ID,
        &RegisterValue
        );

    *pValue = (U8)((RegisterValue >> 8) & 0xFF);

    return ApiSuccess;
}




/******************************************************************************
 *
 * Function   :  PlxPciVpdRead
 *
 * Description:  Read the Vital Product Data
 *
 ******************************************************************************/
RETURN_CODE
PlxPciVpdRead(
    DEVICE_EXTENSION *pdx,
    U16               offset,
    U32              *pValue
    )
{
    S16 VpdRetries;
    S16 VpdPollCount;
    U32 RegisterValue;


    // Check for unaligned offset
    if (offset & 0x3)
    {
        *pValue = (U32)-1;
        return ApiInvalidOffset;
    }

    // Prepare VPD command
    RegisterValue = ((U32)offset << 16) | 0x3;

    VpdRetries = VPD_COMMAND_MAX_RETRIES;
    do
    {
        /**************************************
        *  This loop will continue until the
        *  VPD reports success or until we reach
        *  the maximum number of retries
        **************************************/

        // Send VPD Command
        PLX_PCI_REG_WRITE(
            pdx,
            PCI9054_VPD_CAP_ID,
            RegisterValue
            );

        // Poll until VPD operation has completed
        VpdPollCount = VPD_STATUS_MAX_POLL;
        do
        {
            // Delay for a bit for VPD operation
            Plx_sleep(VPD_STATUS_POLL_DELAY);

            // Get VPD Status
            PLX_PCI_REG_READ(
                pdx,
                PCI9054_VPD_CAP_ID,
                &RegisterValue
                );

            // Check for command completion
            if (RegisterValue & (1 << 31))
            {
                /*******************************************
                * The VPD successfully read the EEPROM. Get
                * the value & return a status of SUCCESS.
                *******************************************/

                // Get the VPD Data result
                PLX_PCI_REG_READ(
                    pdx,
                    PCI9054_VPD_DATA,
                    &RegisterValue
                    );

                *pValue = RegisterValue;

                return ApiSuccess;
            }
        }
        while (VpdPollCount--);
    }
    while (VpdRetries--);

    /******************************************
    * VPD access failed if we reach this 
    * point - return an ERROR status
    *******************************************/

    DebugPrintf(("ERROR - PlxPciVpdRead() failed, VPD timeout\n"));

    *pValue = (U32)-1;

    return ApiFailed;
}




/******************************************************************************
 *
 * Function   :  PlxPciVpdWrite
 *
 * Description:  Write to the Vital Product Data
 *
 ******************************************************************************/
RETURN_CODE
PlxPciVpdWrite(
    DEVICE_EXTENSION *pdx,
    U16               offset,
    U32               VpdData
    )
{
    S16 VpdRetries;
    S16 VpdPollCount;
    U32 RegisterValue;


    // Check for unaligned offset
    if (offset & 0x3)
        return ApiInvalidOffset;

    // Put write value into VPD Data register
    PLX_PCI_REG_WRITE(
        pdx,
        PCI9054_VPD_DATA,
        VpdData
        );

    // Prepare VPD command
    RegisterValue = (1 << 31) | ((U32)offset << 16) | 0x3;

    VpdRetries = VPD_COMMAND_MAX_RETRIES;
    do
    {
        /**************************************
        *  This loop will continue until the
        *  VPD reports success or until we reach
        *  the maximum number of retries
        **************************************/

        // Send VPD command
        PLX_PCI_REG_WRITE(
            pdx,
            PCI9054_VPD_CAP_ID,
            RegisterValue
            );

        // Poll until VPD operation has completed
        VpdPollCount = VPD_STATUS_MAX_POLL;
        do
        {
            // Delay for a bit for VPD operation
            Plx_sleep(VPD_STATUS_POLL_DELAY);

            // Get VPD Status
            PLX_PCI_REG_READ(
                pdx,
                PCI9054_VPD_CAP_ID,
                &RegisterValue
                );

            // Check for command completion
            if ((RegisterValue & (1 << 31)) == 0)
            {
                /*******************************************
                * The VPD successfully wrote to the EEPROM.
                *******************************************/
                return ApiSuccess;
            }
        }
        while (VpdPollCount--);
    }
    while (VpdRetries--);

    /******************************************
    * VPD access failed if we reach this 
    * point - return an ERROR status
    *******************************************/

    DebugPrintf(("ERROR - PlxPciVpdWrite() failed, VPD timeout\n"));

    return ApiFailed;
}




/******************************************************************************
 *
 * Function   :  PlxEepromPresent
 *
 * Description:  Determine if a programmed EEPROM is present on the device
 *
 ******************************************************************************/
RETURN_CODE
PlxEepromPresent(
    DEVICE_EXTENSION *pdx,