fpga_led_test_assignment_defaults.qdf

FPGA开发板上自带的LED测试例程

set_global_assignment -name ENABLE_DEVICE_WIDE_OE Off
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "As output driving ground"
set_global_assignment -name FLEX10K_ENABLE_LOCK_OUTPUT Off
set_global_assignment -name ENABLE_INIT_DONE_OUTPUT Off
set_global_assignment -name RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION "Use as regular IO"
set_global_assignment -name RESERVE_RDYNBUSY_AFTER_CONFIGURATION "Use as regular IO"
set_global_assignment -name RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION "Use as regular IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "As input tri-stated"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "Use as regular IO"
set_global_assignment -name CRC_ERROR_CHECKING Off
set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO Paths and Minimum TPD Paths"
set_global_assignment -name OPTIMIZE_FAST_CORNER_TIMING Off
set_global_assignment -name GUARANTEE_MIN_DELAY_CORNER_IO_ZERO_HOLD_TIME On
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING "Normal compilation"
set_global_assignment -name OPTIMIZE_TIMING "Normal compilation"
set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING On
set_global_assignment -name FIT_ONLY_ONE_ATTEMPT Off
set_global_assignment -name STRIPE_TO_PLD_BRIDGE_EPXA4_10 "MegaLAB column 1"
set_global_assignment -name PROCESSOR_DEBUG_EXTENSIONS_EPXA4_10 "MegaLAB column 2"
set_global_assignment -name PLD_TO_STRIPE_INTERRUPTS_EPXA4_10 "MegaLAB column 2"
set_global_assignment -name STRIPE_TO_PLD_INTERRUPTS_EPXA4_10 "MegaLAB column 2"
set_global_assignment -name DPRAM_INPUT_EPXA4_10 "Default input routing options"
set_global_assignment -name DPRAM_OUTPUT_EPXA4_10 "Default output routing options"
set_global_assignment -name DPRAM_OTHER_SIGNALS_EPXA4_10 "Default other routing options"
set_global_assignment -name DPRAM_DEEP_MODE_INPUT_EPXA4_10 "MegaLAB column 3"
set_global_assignment -name DPRAM_WIDE_MODE_INPUT_EPXA4_10 "Lower to 3 Upper to 4"
set_global_assignment -name DPRAM_SINGLE_PORT_MODE_INPUT_EPXA4_10 "DPRAM0 to 3 DPRAM1 to 4"
set_global_assignment -name DPRAM_DUAL_PORT_MODE_INPUT_EPXA4_10 "DPRAM0 to 3 DPRAM1 to 4"
set_global_assignment -name DPRAM_DEEP_MODE_OUTPUT_EPXA4_10 "MegaLAB column 3"
set_global_assignment -name DPRAM_WIDE_MODE_OUTPUT_EPXA4_10 "Lower to 3 Upper to 4ESB"
set_global_assignment -name DPRAM_SINGLE_PORT_MODE_OUTPUT_EPXA4_10 "DPRAM0 to 3 DPRAM1 to 4ESB"
set_global_assignment -name DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA4_10 "DPRAM0 to 3 DPRAM1 to 4ESB"
set_global_assignment -name DPRAM_DEEP_MODE_OTHER_SIGNALS_EPXA4_10 "MegaLAB column 3"
set_global_assignment -name DPRAM_WIDE_MODE_OTHER_SIGNALS_EPXA4_10 "MegaLAB column 3"
set_global_assignment -name DPRAM_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA4_10 "DPRAM0 to 3 DPRAM1 to 4"
set_global_assignment -name DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA4_10 "DPRAM0 to 3 DPRAM1 to 4"
set_global_assignment -name DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_INPUT_EPXA1 "MegaLAB column 1"
set_global_assignment -name DPRAM_32BIT_SINGLE_PORT_MODE_INPUT_EPXA1 "MegaLAB column 1"
set_global_assignment -name DPRAM_DUAL_PORT_MODE_INPUT_EPXA1 "DPRAM0 to 1 DPRAM1 to 2"
set_global_assignment -name DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 "MegaLAB column 1"
set_global_assignment -name DPRAM_32BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 "Lower to 1ESB Upper to 1"
set_global_assignment -name DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA1 "DPRAM0 to 1 DPRAM1 to 2"
set_global_assignment -name DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 "MegaLAB column 1"
set_global_assignment -name DPRAM_32BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 "MegaLAB column 1"
set_global_assignment -name DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 "DPRAM0 to 1 DPRAM1 to 2"
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION Automatically
set_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION Automatically
set_global_assignment -name SEED 1
set_global_assignment -name SLOW_SLEW_RATE Off
set_global_assignment -name PCI_IO Off
set_global_assignment -name TURBO_BIT On
set_global_assignment -name WEAK_PULL_UP_RESISTOR Off
set_global_assignment -name ENABLE_BUS_HOLD_CIRCUITRY Off
set_global_assignment -name AUTO_GLOBAL_MEMORY_CONTROLS Off
set_global_assignment -name MIGRATION_CONSTRAIN_CORE_RESOURCES On
set_global_assignment -name AUTO_PACKED_REGISTERS_STRATIXII AUTO
set_global_assignment -name AUTO_PACKED_REGISTERS_MAXII AUTO
set_global_assignment -name AUTO_PACKED_REGISTERS_CYCLONE Auto
set_global_assignment -name AUTO_PACKED_REGISTERS Off
set_global_assignment -name AUTO_PACKED_REGISTERS_STRATIX AUTO
set_global_assignment -name NORMAL_LCELL_INSERT On
set_global_assignment -name CARRY_OUT_PINS_LCELL_INSERT On
set_global_assignment -name AUTO_DELAY_CHAINS On
set_global_assignment -name AUTO_MERGE_PLLS On
set_global_assignment -name AUTO_TURBO_BIT ON
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC Off
set_global_assignment -name PHYSICAL_SYNTHESIS_LOG_FILE Off
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION Off
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING Off
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING Off
set_global_assignment -name IO_PLACEMENT_OPTIMIZATION On
set_global_assignment -name ALLOW_LVTTL_LVCMOS_INPUT_LEVELS_TO_OVERDRIVE_INPUT_BUFFER Off
set_global_assignment -name OVERRIDE_DEFAULT_ELECTROMIGRATION_PARAMETERS Off
set_global_assignment -name FITTER_EFFORT -value "AUTO FIT"
set_global_assignment -name FITTER_AUTO_EFFORT_DESIRED_SLACK_MARGIN 0ns
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT Normal
set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION AUTO
set_global_assignment -name ROUTER_REGISTER_DUPLICATION Off
set_global_assignment -name STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET Off
set_global_assignment -name AUTO_GLOBAL_CLOCK On
set_global_assignment -name AUTO_GLOBAL_OE On
set_global_assignment -name AUTO_GLOBAL_REGISTER_CONTROLS On
set_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE Realistic
set_global_assignment -name STRATIXGX_ALLOW_GIGE_UNDER_FULL_DATARATE_RANGE Off
set_global_assignment -name STRATIXGX_ALLOW_RX_CORECLK_FROM_NON_RX_CLKOUT_SOURCE_IN_DOUBLE_DATA_WIDTH_MODE Off
set_global_assignment -name STRATIXGX_ALLOW_GIGE_IN_DOUBLE_DATA_WIDTH_MODE Off
set_global_assignment -name STRATIXGX_ALLOW_PARALLEL_LOOPBACK_IN_DOUBLE_DATA_WIDTH_MODE Off
set_global_assignment -name STRATIXGX_ALLOW_XAUI_IN_SINGLE_DATA_WIDTH_MODE Off
set_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off
set_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off
set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off
set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITHOUT_8B10B Off
set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off
set_global_assignment -name STRATIXGX_ALLOW_POST8B10B_LOOPBACK Off
set_global_assignment -name STRATIXGX_ALLOW_REVERSE_PARALLEL_LOOPBACK Off
set_global_assignment -name STRATIXGX_ALLOW_USE_OF_GXB_COUPLED_IOS Off
set_global_assignment -name DRC_REPORT_TOP_FANOUT On
set_global_assignment -name DRC_TOP_FANOUT 50
set_global_assignment -name DRC_REPORT_FANOUT_EXCEEDING On
set_global_assignment -name DRC_FANOUT_EXCEEDING 30
set_global_assignment -name SIGNALRACE_RULE_TRISTATE On
set_global_assignment -name SIGNALRACE_RULE_RESET_RACE On
set_global_assignment -name HCPY_PLL_MULTIPLE_CLK_NETWORK_TYPES On
set_global_assignment -name NONSYNCHSTRUCT_RULE_ASYN_RAM On
set_global_assignment -name HARDCOPY_FLOW_AUTOMATION MIGRATION_ONLY
set_global_assignment -name ENABLE_DRC_SETTINGS Off
set_global_assignment -name CLK_CAT On
set_global_assignment -name CLK_RULE_COMB_CLOCK On
set_global_assignment -name CLK_RULE_INV_CLOCK On
set_global_assignment -name CLK_RULE_GATING_SCHEME On
set_global_assignment -name CLK_RULE_INPINS_CLKNET On
set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES On
set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES_THRESHOLD 25
set_global_assignment -name CLK_RULE_MIX_EDGES On
set_global_assignment -name RESET_CAT On
set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET On
set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET On
set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET On
set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN On
set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN On
set_global_assignment -name TIMING_CAT On
set_global_assignment -name NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE On
set_global_assignment -name NONSYNCHSTRUCT_CAT On
set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP On
set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP On
set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN On
set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK On
set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN On
set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR On
set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH On
set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED On
set_global_assignment -name SIGNALRACE_CAT On
set_global_assignment -name ACLK_CAT On
set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN On
set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN On
set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN On
set_global_assignment -name HCPY_CAT On
set_global_assignment -name HCPY_VREF_PINS On
set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION On
set_global_assignment -name COMPRESSION_MODE Off
set_global_assignment -name CLOCK_SOURCE Internal
set_global_assignment -name CONFIGURATION_CLOCK_FREQUENCY "10 MHz"
set_global_assignment -name CONFIGURATION_CLOCK_DIVISOR 1
set_global_assignment -name ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On
set_global_assignment -name FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE Off
set_global_assignment -name FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On
set_global_assignment -name MAX7000S_JTAG_USER_CODE FFFF
set_global_assignment -name STRATIX_JTAG_USER_CODE FFFFFFFF
set_global_assignment -name APEX20K_JTAG_USER_CODE FFFFFFFF
set_global_assignment -name MERCURY_JTAG_USER_CODE FFFFFFFF
set_global_assignment -name FLEX10K_JTAG_USER_CODE 7F
set_global_assignment -name MAX7000_JTAG_USER_CODE FFFFFFFF
set_global_assignment -name MAX7000_USE_CHECKSUM_AS_USERCODE Off
set_global_assignment -name USE_CHECKSUM_AS_USERCODE Off
set_global_assignment -name SECURITY_BIT Off
set_global_assignment -name USE_CONFIGURATION_DEVICE On
set_global_assignment -name STRATIX_II_CONFIGURATION_DEVICE Auto
set_global_assignment -name APEX20K_CONFIGURATION_DEVICE Auto
set_global_assignment -name EXCALIBUR_CONFIGURATION_DEVICE Auto
set_global_assignment -name MERCURY_CONFIGURATION_DEVICE Auto
set_global_assignment -name FLEX6K_CONFIGURATION_DEVICE Auto
set_global_assignment -name FLEX10K_CONFIGURATION_DEVICE Auto
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE Auto
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE Auto
set_global_assignment -name APEX20K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
set_global_assignment -name STRATIX_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
set_global_assignment -name MERCURY_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
set_global_assignment -name FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
set_global_assignment -name EPROM_USE_CHECKSUM_AS_USERCODE Off
set_global_assignment -name AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE On
set_global_assignment -name DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE Off
set_global_assignment -name GENERATE_TTF_FILE Off
set_global_assignment -name GENERATE_RBF_FILE Off
set_global_assignment -name GENERATE_HEX_FILE Off
set_global_assignment -name HEXOUT_FILE_START_ADDRESS 0
set_global_assignment -name HEXOUT_FILE_COUNT_DIRECTION Up
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "As output driving an unspecified signal"
set_global_assignment -name RELEASE_CLEARS_BEFORE_TRI_STATES Off
set_global_assignment -name AUTO_RESTART_CONFIGURATION On
set_global_assignment -name ALWAYS_ENABLE_INPUT_BUFFERS Off
set_global_assignment -name ENABLE_ASMI_FOR_FLASH_LOADER Off
set_global_assignment -name HARDCOPYII_POWER_ON_EXTRA_DELAY Off
set_global_assignment -name STRATIXII_MRAM_COMPATIBILITY Off
set_global_assignment -name CYCLONEII_M4K_COMPATIBILITY On
set_global_assignment -name DUTY_CYCLE 50 -section_id ?
set_global_assignment -name INVERT_BASE_CLOCK Off -section_id ?
set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id ?
set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id ?
set_global_assignment -name EDA_LAUNCH_CMD_LINE_TOOL Off -section_id ?
set_global_assignment -name EDA_USE_RISE_FALL_DELAYS Off -section_id ?
set_global_assignment -name EDA_ENABLE_OCV_TIMING_ANALYSIS Off -section_id ?
set_global_assignment -name EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION Off -section_id ?
set_global_assignment -name EDA_TRUNCATE_LONG_HIERARCHY_PATHS Off -section_id ?
set_global_assignment -name EDA_FLATTEN_BUSES Off -section_id ?
set_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS Off -section_id ?
set_global_assignment -name EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE Off -section_id ?
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT NONE -section_id ?
set_global_assignment -name EDA_GENERATE_TIMING_CLOSURE_DATA Off -section_id ?
set_global_assignment -name EDA_GENERATE_POWER_INPUT_FILE Off -section_id ?
set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS NOT_USED -section_id ?
set_global_assignment -name EDA_RTL_SIM_MODE NOT_USED -section_id ?
set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY Off -section_id ?
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST Off -section_id ?
set_global_assignment -name EDA_WRITE_DEVICE_CONTROL_PORTS Off -section_id ?
set_global_assignment -name EDA_ENABLE_GLITCH_FILTERING Off -section_id ?
set_global_assignment -name EDA_WRITE_NODES_FOR_POWER_ESTIMATION OFF -section_id ?
set_global_assignment -name EDA_INPUT_GND_NAME GND -section_id ?
set_global_assignment -name EDA_INPUT_VCC_NAME VCC -section_id ?
set_global_assignment -name EDA_INPUT_DATA_FORMAT EDIF -section_id ?
set_global_assignment -name EDA_SHOW_LMF_MAPPING_MESSAGES Off -section_id ?
set_global_assignment -name EDA_RUN_TOOL_AUTOMATICALLY Off -section_id ?
set_global_assignment -name RESYNTHESIS_RETIMING FULL -section_id ?
set_global_assignment -name RESYNTHESIS_OPTIMIZATION_EFFORT Normal -section_id ?
set_global_assignment -name RESYNTHESIS_PHYSICAL_SYNTHESIS Normal -section_id ?
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS On -section_id ?
set_global_assignment -name VCCPD_VOLTAGE 3.3V -section_id ?
set_global_assignment -name APEX20K_CLIQUE_TYPE LAB -section_id ? -entity ?
set_global_assignment -name MAX7K_CLIQUE_TYPE LAB -section_id ? -entity ?
set_global_assignment -name MERCURY_CLIQUE_TYPE LAB -section_id ? -entity ?
set_global_assignment -name FLEX6K_CLIQUE_TYPE LAB -section_id ? -entity ?
set_global_assignment -name FLEX10K_CLIQUE_TYPE LAB -section_id ? -entity ?
set_global_assignment -name PARTITION_IMPORT_NEW_ASSIGNMENTS On -section_id ? -entity ?
set_global_assignment -name PARTITION_IMPORT_EXISTING_ASSIGNMENTS REPLACE_CONFLICTING -section_id ? -entity ?
set_global_assignment -name PARTITION_IMPORT_EXISTING_LOGICLOCK_REGIONS REPLACE_CONFLICTING -section_id ? -entity ?
set_global_assignment -name PARTITION_IMPORT_PIN_ASSIGNMENTS On -section_id ? -entity ?
set_global_assignment -name PARTITION_IMPORT_PROMOTE_ASSIGNMENTS On -section_id ? -entity ?