📄 tct.s
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; else
;
; /* Set the remaining bytes to 0. */
; remaining = 0;
;
; /* Return the remaining number of bytes on the stack. */
; return(remaining);
;
TCT_Skip_Stack_Check
MOV a1,a4 ; Return remaining bytes
[ THUMB
BX lr ; Return to caller
|
MOV pc,lr ; Return to caller
]
;}
;
;
;
;/*************************************************************************/
;/* */
;/* FUNCTION */
;/* */
;/* TCC_Schedule */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function waits for a thread to become ready. Once a thread */
;/* is ready, this function initiates a transfer of control to that */
;/* thread. */
;/* */
;/* CALLED BY */
;/* */
;/* INC_Initialize Main initialization routine */
;/* */
;/* CALLS */
;/* */
;/* TCT_Control_To_Thread Transfer control to a thread */
;/* */
;/* INPUTS */
;/* */
;/* TCD_Execute_Task Pointer to task to execute */
;/* */
;/* OUTPUTS */
;/* */
;/* None */
;/* */
;/* HISTORY */
;/* */
;/* NAME DATE REMARKS */
;/* */
;/* W. Lamie 02-15-1994 Created initial version 1.0 */
;/* D. Lamie 02-15-1994 Verified version 1.0 */
;/* */
;/*************************************************************************/
;VOID TCT_Schedule(void)
;{
EXPORT TCT_Schedule
TCT_Schedule
;
; /* Restore interrupts according to the value contained in
; TCD_Interrupt_Level. */
;
LDR a2,Int_Level ; Build address of interrupt level
MRS a1,CPSR ; Pickup current CPSR
LDR a3,[a2, #0] ; Pickup current interrupt lockout
BIC a1,a1,#LOCK_MSK ; Clear the interrupt lockout bits
ORR a1,a1,a3 ; Build new interrupt lockout CPSR
MSR CPSR_cxsf,a1 ; Setup new CPSR
LDR a3,Execute_HISR ; Pickup TCD_Execute_HISR address
LDR a4,Execute_Task ; Pickup TCD_Execute_Task address
;
IF INCLUDE_PROVIEW
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Nucleus ProView Hook
;
; We check if upon entering TCT_Schedule we already have a task to excute.
; if not, we start IDLE.
LDR a1,[a3, #0] ; Pickup highest priority HISR ptr
CMP a1,#0 ; Is there a HISR active?
BNE TCT_Schedule_Thread ; Found an HISR
LDR a1,[a4, #0] ; Pickup highest priority Task ptr
CMP a1,#0 ; Is there a task active?
BNE TCT_Schedule_Thread ; If not, start IDLE.
STR a3,[sp, #-4]! ; Save a3 on the stack
STR a4,[sp, #-4]! ; Save a4 on the stack
BL _NU_Idle_Hook
LDR a4,[sp], #4 ; Recover a3
LDR a3,[sp], #4 ; Recover a4
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ENDIF
; /* Wait until a thread (task or HISR) is available to execute. */
; do
; {
TCT_Schedule_Loop
;
; } while ((!TCD_Execute_HISR) && (!TCD_Execute_Task));
;
LDR a1,[a3, #0] ; Pickup highest priority HISR ptr
CMP a1,#0 ; Is there a HISR active?
BNE TCT_Schedule_Thread ; Found an HISR
LDR a1,[a4, #0] ; Pickup highest priority Task ptr
CMP a1,#0 ; Is there a task active?
BEQ TCT_Schedule_Loop ; If not, continue the search
;
; /* Yes, either a task or an HISR is ready to execute. Lockout
; interrupts while the thread is transferred to. */
;
TCT_Schedule_Thread
MRS a2,CPSR ; Pickup CPSR again
ORR a2,a2,#LOCKOUT ; Build interrupt lockout value
MSR CPSR_cxsf,a2 ; Lockout interrupts
;
; /* Transfer control to the thread by falling through to the following
; routine. */
;}
;
;
;
;/*************************************************************************/
;/* */
;/* FUNCTION */
;/* */
;/* TCT_Control_To_Thread */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function transfers control to the specified thread. Each */
;/* time control is transferred to a thread, its scheduled counter */
;/* is incremented. Additionally, time-slicing for task threads is */
;/* enabled in this routine. The TCD_Current_Thread pointer is */
;/* setup by this function. */
;/* */
;/* CALLED BY */
;/* */
;/* TCT_Schedule Indirectly called */
;/* TCT_Protect Protection task switch */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* INPUTS */
;/* */
;/* thread Thread control block pointer */
;/* */
;/* OUTPUTS */
;/* */
;/* None */
;/* */
;/* HISTORY */
;/* */
;/* NAME DATE REMARKS */
;/* */
;/* W. Lamie 02-15-1994 Created initial version 1.0 */
;/* D. Lamie 02-15-1994 Verified version 1.0 */
;/* */
;/*************************************************************************/
;VOID TCT_Control_To_Thread(TC_TCB *thread)
;{
EXPORT TCT_Control_To_Thread
TCT_Control_To_Thread
;
; /* Setup the current thread pointer. */
; TCD_Current_Thread = (VOID *) thread;
;
LDR a2,Current_Thread ; Pickup current thread ptr address
LDR a3,[a1, #&1c] ; Pickup scheduled count
STR a1,[a2, #0] ; Setup current thread pointer
;
; /* Increment the thread scheduled counter. */
; thread -> tc_scheduled++;
;
LDR a4,[a1, #&20] ; Pickup time slice value
ADD a3,a3,#1 ; Increment the scheduled count
STR a3,[a1, #&1c] ; Store new scheduled count
;
; /* Check for time slice option. */
; if (thread -> tc_cur_time_slice)
; {
CMP a4,#0 ; Is there a time slice?
BEQ TCT_No_Start_TS_1 ; If 0, there is no time slice
;
; /* Start a time slice. */
; TMD_Time_Slice = thread -> tc_cur_time_slice;
; TMD_Time_Slice_State = 0;
;
LDR a3,Time_Slice ; Pickup address of TMD_Time_Slice
LDR a2,Slice_State ; Pickup address of
; TMD_Time_Slice_State
STR a4,[a3, #0] ; Setup the time slice
MOV a3,#0 ; Build active state flag
STR a3,[a2,#0] ; Set the active flag
; }
TCT_No_Start_TS_1
;
IF INCLUDE_PROVIEW
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Nucleus ProView Hook
;
STR a1,[sp, #-4]! ; Save a1 on the stack
BL _NU_Schedule_Task_Hook ; Branch to RTView
LDR a1,[sp], #4 ; Recover return address
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ENDIF
; /* Pickup the stack pointer and resume the thread. */
; REG_Stack_Ptr = thread -> tc_stack_pointer;
;
LDR sp,[a1, #&2c] ; Switch to thread's stack pointer
;
; /* Pop off the saved information associated with the thread. After we
; determine which type of stack is present. A 1 on the top of the
; stack indicates an interrupt stack, while a 0 on the top of the
; stack indicates a solicited type of stack. */
;
; /* Remember that the interrupt level that is restored must represent
; the interrupt level in TCD_Interrupt_Level. */
;
LDR a2,[sp], #4 ; Pop off the stack type
CMP a2,#1 ; See if it is an interrupt stack
BEQ TCT_Interrupt_Resume ; If so, an interrupt resume of
; thread is required
LDR a2,Int_Level ; Pickup address of interrupt
; lockout
MRS a1,CPSR ; Pickup current CPSR
BIC a1,a1,#LOCK_MSK ; Clear lockout mask
LDR a3,[a2, #0] ; Pickup interrupt lockout mask
ORR a1,a1,a3 ; Build new interrupt lockout mask
[ THUMB
LDR a3,[sp], #4 ; Pop off the state mask
ORR a1,a1,a3 ; Set appropriate state
]
MSR SPSR_cxsf,a1 ; Place it into the SPSR
LDMIA sp!,{v1-ip,pc}^ ; A solicited return is required.
; This type of return only
; recovers v1-sp & pc
TCT_Interrupt_Resume
LDR a1,[sp], #4 ; Pop off the CPSR
LDR a2,Int_Level ; Pickup address of interrupt
; lockout
BIC a1,a1,#LOCK_MSK ; Clear lockout mask
LDR a3,[a2, #0] ; Pickup interrupt lockout mask
ORR a1,a1,a3 ; Build new interrupt lockout mask
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