📄 02-8a-7.lst
字号:
__start:
__text_start:
001A EFCF LDI R28,0xFF
001B E0D2 LDI R29,2
001C BFCD OUT 0x3D,R28
001D BFDE OUT 0x3E,R29
001E 51C0 SUBI R28,0x10
001F 40D0 SBCI R29,0
0020 EA0A LDI R16,0xAA
0021 8308 STD Y+0,R16
0022 2400 CLR R0
0023 E0E0 LDI R30,0
0024 E0F1 LDI R31,1
0025 E011 LDI R17,1
0026 30E0 CPI R30,0
0027 07F1 CPC R31,R17
0028 F011 BEQ 0x002B
0029 9201 ST R0,Z+
002A CFFB RJMP 0x0026
002B 8300 STD Z+0,R16
002C E3E4 LDI R30,0x34
002D E0F0 LDI R31,0
002E E0A0 LDI R26,0
002F E0B1 LDI R27,1
0030 E010 LDI R17,0
0031 33E4 CPI R30,0x34
0032 07F1 CPC R31,R17
0033 F021 BEQ 0x0038
0034 95C8 LPM
0035 9631 ADIW R30,1
0036 920D ST R0,X+
0037 CFF9 RJMP 0x0031
0038 D01B RCALL _main
_exit:
0039 CFFF RJMP _exit
FILE: D:\xij\demo\demo_diy02-8a\1\C语言\02-8A-7\7.c
(0001) #include "iom48v.h"
(0002)
(0003) void port_init()
(0004) {
(0005) PORTD=0XFF;DDRD=0XFB;//设置PD2输入,其它输出
_port_init:
003A EF8F LDI R24,0xFF
003B B98B OUT 0x0B,R24
003C EF8B LDI R24,0xFB
003D B98A OUT 0x0A,R24
003E 9508 RET
(0006) }
(0007)
(0008) void delay_us(int time)
(0009) { //微秒延时
(0010) do
(0011) {
(0012) time--;
_delay_us:
time --> R16
003F 5001 SUBI R16,1
0040 4010 SBCI R17,0
(0013) }
(0014) while (time>1);
0041 E081 LDI R24,1
0042 E090 LDI R25,0
0043 1780 CP R24,R16
0044 0791 CPC R25,R17
0045 F3CC BLT 0x003F
0046 9508 RET
_delay_ms:
time --> R20
0047 D025 RCALL push_gset1
0048 01A8 MOVW R20,R16
(0015) }
(0016)
(0017) void delay_ms(unsigned int time)
(0018) { //毫秒延时
0049 C005 RJMP 0x004F
(0019) while(time!=0)
(0020) {
(0021) delay_us(1000);
004A EE08 LDI R16,0xE8
004B E013 LDI R17,3
004C DFF2 RCALL _delay_us
(0022) time--;
004D 5041 SUBI R20,1
004E 4050 SBCI R21,0
004F 3040 CPI R20,0
0050 0745 CPC R20,R21
0051 F7C1 BNE 0x004A
0052 D01D RCALL pop_gset1
0053 9508 RET
(0023) }
(0024) }
(0025)
(0026) void main()
(0027) {
(0028) unsigned char i;
(0029) port_init(); //端口初始化
_main:
i --> R20
0054 DFE5 RCALL _port_init
0055 C00D RJMP 0x0063
(0030) while(1){
(0031) i=PIND&0x04; //读出PD2口状态
0056 B149 IN R20,0x09
0057 7044 ANDI R20,4
(0032) if(i==0)
0058 F441 BNE 0x0061
(0033) {PORTD^=0x8;
0059 E088 LDI R24,0x8
005A B02B IN R2,0x0B
005B 2628 EOR R2,R24
005C B82B OUT 0x0B,R2
(0034) delay_ms(100);}
005D E604 LDI R16,0x64
005E E010 LDI R17,0
005F DFE7 RCALL _delay_ms
0060 C002 RJMP 0x0063
(0035) else
(0036) PORTD=0XFF;
FILE: <library>
0061 EF8F LDI R24,0xFF
0062 B98B OUT 0x0B,R24
0063 CFF2 RJMP 0x0056
0064 9508 RET
push_gset5:
0065 92FA ST R15,-Y
0066 92EA ST R14,-Y
push_gset4:
0067 92DA ST R13,-Y
0068 92CA ST R12,-Y
push_gset3:
0069 92BA ST R11,-Y
006A 92AA ST R10,-Y
push_gset2:
006B 937A ST R23,-Y
006C 936A ST R22,-Y
push_gset1:
006D 935A ST R21,-Y
006E 934A ST R20,-Y
006F 9508 RET
pop_gset1:
0070 E0E1 LDI R30,1
pop:
0071 9149 LD R20,Y+
0072 9159 LD R21,Y+
0073 FDE0 SBRC R30,0
0074 9508 RET
0075 9169 LD R22,Y+
0076 9179 LD R23,Y+
0077 FDE1 SBRC R30,1
0078 9508 RET
0079 90A9 LD R10,Y+
007A 90B9 LD R11,Y+
007B FDE2 SBRC R30,2
007C 9508 RET
007D 90C9 LD R12,Y+
007E 90D9 LD R13,Y+
007F FDE3 SBRC R30,3
0080 9508 RET
0081 90E9 LD R14,Y+
0082 90F9 LD R15,Y+
0083 9508 RET
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