ex.map.qmsg

cpld系统 EWB Quartus2编译 电子综合设计试验箱程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Aug 26 11:36:28 2008 " "Info: Processing started: Tue Aug 26 11:36:28 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off ex -c ex " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ex -c ex" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ex.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ex.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 ex " "Info: Found entity 1: ex" {  } { { "ex.bdf" "" { Schematic "G:/电子综合设计实验箱测试程序/电子综合设计实验箱测试程序/02_CPLD系统模块/ex.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "LED.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file LED.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 led-one " "Info: Found design unit 1: led-one" {  } { { "LED.vhd" "" { Text "G:/电子综合设计实验箱测试程序/电子综合设计实验箱测试程序/02_CPLD系统模块/LED.vhd" 26 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 led " "Info: Found entity 1: led" {  } { { "LED.vhd" "" { Text "G:/电子综合设计实验箱测试程序/电子综合设计实验箱测试程序/02_CPLD系统模块/LED.vhd" 13 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Block1.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file Block1.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 Block1 " "Info: Found entity 1: Block1" {  } { { "Block1.bdf" "" { Schematic "G:/电子综合设计实验箱测试程序/电子综合设计实验箱测试程序/02_CPLD系统模块/Block1.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "LED " "Info: Elaborating entity \"LED\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "led8\[7\] GND " "Warning (13410): Pin \"led8\[7\]\" is stuck at GND" {  } { { "LED.vhd" "" { Text "G:/电子综合设计实验箱测试程序/电子综合设计实验箱测试程序/02_CPLD系统模块/LED.vhd" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "seg\[7\] GND " "Warning (13410): Pin \"seg\[7\]\" is stuck at GND" {  } { { "LED.vhd" "" { Text "G:/电子综合设计实验箱测试程序/电子综合设计实验箱测试程序/02_CPLD系统模块/LED.vhd" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0 0}
{ "Info" "IFTM_FTM_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "LED.vhd" "" { Text "G:/电子综合设计实验箱测试程序/电子综合设计实验箱测试程序/02_CPLD系统模块/LED.vhd" 33 -1 0 } }  } 0 0 "Registers with preset signals will power-up high" 0 0 "" 0 0}
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "4 4 " "Info: 4 registers lost all their fanouts during netlist optimizations. The first 4 are displayed below." { { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "cnt\[28\] " "Info: Register \"cnt\[28\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "cnt\[29\] " "Info: Register \"cnt\[29\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "cnt\[30\] " "Info: Register \"cnt\[30\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "cnt\[31\] " "Info: Register \"cnt\[31\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 0}  } {  } 0 0 "%1!d! registers lost all their fanouts during netlist optimizations. The first %2!d! are displayed below." 0 0 "" 0 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "105 " "Info: Implemented 105 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "9 " "Info: Implemented 9 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_OPINS" "47 " "Info: Implemented 47 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_LCELLS" "49 " "Info: Implemented 49 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 3 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "174 " "Info: Peak virtual memory: 174 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Aug 26 11:36:31 2008 " "Info: Processing ended: Tue Aug 26 11:36:31 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}