prev_cmp_led.map.qmsg

cpld系统 EWB Quartus2编译 电子综合设计试验箱程序

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "Data_s1_arbitrator LCD:inst3\|Data_s1_arbitrator:the_Data_s1 " "Info: Elaborating entity \"Data_s1_arbitrator\" for hierarchy \"LCD:inst3\|Data_s1_arbitrator:the_Data_s1\"" {  } { { "LCD.vhd" "the_Data_s1" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2799 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "Data.vhd 2 1 " "Warning: Using design file Data.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 Data-europa " "Info: Found design unit 1: Data-europa" {  } { { "Data.vhd" "" { Text "C:/altera/Hengdun/LED/Data.vhd" 42 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 Data " "Info: Found entity 1: Data" {  } { { "Data.vhd" "" { Text "C:/altera/Hengdun/LED/Data.vhd" 26 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "Data LCD:inst3\|Data:the_Data " "Info: Elaborating entity \"Data\" for hierarchy \"LCD:inst3\|Data:the_Data\"" {  } { { "LCD.vhd" "the_Data" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2823 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "EN_s1_arbitrator LCD:inst3\|EN_s1_arbitrator:the_EN_s1 " "Info: Elaborating entity \"EN_s1_arbitrator\" for hierarchy \"LCD:inst3\|EN_s1_arbitrator:the_EN_s1\"" {  } { { "LCD.vhd" "the_EN_s1" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2836 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "EN.vhd 2 1 " "Warning: Using design file EN.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 EN-europa " "Info: Found design unit 1: EN-europa" {  } { { "EN.vhd" "" { Text "C:/altera/Hengdun/LED/EN.vhd" 42 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 EN " "Info: Found entity 1: EN" {  } { { "EN.vhd" "" { Text "C:/altera/Hengdun/LED/EN.vhd" 26 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "EN LCD:inst3\|EN:the_EN " "Info: Elaborating entity \"EN\" for hierarchy \"LCD:inst3\|EN:the_EN\"" {  } { { "LCD.vhd" "the_EN" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2859 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "RS_s1_arbitrator LCD:inst3\|RS_s1_arbitrator:the_RS_s1 " "Info: Elaborating entity \"RS_s1_arbitrator\" for hierarchy \"LCD:inst3\|RS_s1_arbitrator:the_RS_s1\"" {  } { { "LCD.vhd" "the_RS_s1" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2872 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "RS.vhd 2 1 " "Warning: Using design file RS.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 RS-europa " "Info: Found design unit 1: RS-europa" {  } { { "RS.vhd" "" { Text "C:/altera/Hengdun/LED/RS.vhd" 42 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 RS " "Info: Found entity 1: RS" {  } { { "RS.vhd" "" { Text "C:/altera/Hengdun/LED/RS.vhd" 26 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "RS LCD:inst3\|RS:the_RS " "Info: Elaborating entity \"RS\" for hierarchy \"LCD:inst3\|RS:the_RS\"" {  } { { "LCD.vhd" "the_RS" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2895 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "RW_s1_arbitrator LCD:inst3\|RW_s1_arbitrator:the_RW_s1 " "Info: Elaborating entity \"RW_s1_arbitrator\" for hierarchy \"LCD:inst3\|RW_s1_arbitrator:the_RW_s1\"" {  } { { "LCD.vhd" "the_RW_s1" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2908 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "RW.vhd 2 1 " "Warning: Using design file RW.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 RW-europa " "Info: Found design unit 1: RW-europa" {  } { { "RW.vhd" "" { Text "C:/altera/Hengdun/LED/RW.vhd" 42 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 RW " "Info: Found entity 1: RW" {  } { { "RW.vhd" "" { Text "C:/altera/Hengdun/LED/RW.vhd" 26 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "RW LCD:inst3\|RW:the_RW " "Info: Elaborating entity \"RW\" for hierarchy \"LCD:inst3\|RW:the_RW\"" {  } { { "LCD.vhd" "the_RW" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2931 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_jtag_debug_module_arbitrator LCD:inst3\|cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module " "Info: Elaborating entity \"cpu_jtag_debug_module_arbitrator\" for hierarchy \"LCD:inst3\|cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module\"" {  } { { "LCD.vhd" "the_cpu_jtag_debug_module" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2944 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_data_master_arbitrator LCD:inst3\|cpu_data_master_arbitrator:the_cpu_data_master " "Info: Elaborating entity \"cpu_data_master_arbitrator\" for hierarchy \"LCD:inst3\|cpu_data_master_arbitrator:the_cpu_data_master\"" {  } { { "LCD.vhd" "the_cpu_data_master" { Text "C:/altera/Hengdun/LED/LCD.vhd" 2983 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_instruction_master_arbitrator LCD:inst3\|cpu_instruction_master_arbitrator:the_cpu_instruction_master " "Info: Elaborating entity \"cpu_instruction_master_arbitrator\" for hierarchy \"LCD:inst3\|cpu_instruction_master_arbitrator:the_cpu_instruction_master\"" {  } { { "LCD.vhd" "the_cpu_instruction_master" { Text "C:/altera/Hengdun/LED/LCD.vhd" 3036 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cpu.vhd 46 23 " "Info: Found 46 design units, including 23 entities, in source file cpu.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 cpu_rf_module-europa " "Info: Found design unit 1: cpu_rf_module-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 56 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 cpu_nios2_oci_debug-europa " "Info: Found design unit 2: cpu_nios2_oci_debug-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 194 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 cpu_ociram_lpm_dram_bdp_component_module-europa " "Info: Found design unit 3: cpu_ociram_lpm_dram_bdp_component_module-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 312 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "4 cpu_nios2_ocimem-europa " "Info: Found design unit 4: cpu_nios2_ocimem-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 450 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "5 cpu_nios2_avalon_reg-europa " "Info: Found design unit 5: cpu_nios2_avalon_reg-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 611 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "6 cpu_nios2_oci_break-europa " "Info: Found design unit 6: cpu_nios2_oci_break-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 727 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "7 cpu_nios2_oci_xbrk-europa " "Info: Found design unit 7: cpu_nios2_oci_xbrk-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1198 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "8 cpu_nios2_oci_match_paired-europa " "Info: Found design unit 8: cpu_nios2_oci_match_paired-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1395 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "9 cpu_nios2_oci_match_single-europa " "Info: Found design unit 9: cpu_nios2_oci_match_single-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1434 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "10 cpu_nios2_oci_dbrk-europa " "Info: Found design unit 10: cpu_nios2_oci_dbrk-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1499 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "11 cpu_nios2_oci_itrace-europa " "Info: Found design unit 11: cpu_nios2_oci_itrace-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1731 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "12 cpu_nios2_oci_td_mode-europa " "Info: Found design unit 12: cpu_nios2_oci_td_mode-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1924 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "13 cpu_nios2_oci_dtrace-europa " "Info: Found design unit 13: cpu_nios2_oci_dtrace-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2009 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "14 cpu_nios2_oci_compute_tm_count-europa " "Info: Found design unit 14: cpu_nios2_oci_compute_tm_count-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2107 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "15 cpu_nios2_oci_fifowp_inc-europa " "Info: Found design unit 15: cpu_nios2_oci_fifowp_inc-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2185 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "16 cpu_nios2_oci_fifocount_inc-europa " "Info: Found design unit 16: cpu_nios2_oci_fifocount_inc-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2234 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "17 cpu_nios2_oci_fifo-europa " "Info: Found design unit 17: cpu_nios2_oci_fifo-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2291 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "18 cpu_nios2_oci_pib-europa " "Info: Found design unit 18: cpu_nios2_oci_pib-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2736 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "19 cpu_traceram_lpm_dram_bdp_component_module-europa " "Info: Found design unit 19: cpu_traceram_lpm_dram_bdp_component_module-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2824 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "20 cpu_nios2_oci_im-europa " "Info: Found design unit 20: cpu_nios2_oci_im-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2959 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "21 cpu_nios2_performance_monitors-europa " "Info: Found design unit 21: cpu_nios2_performance_monitors-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 3102 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "22 cpu_nios2_oci-europa " "Info: Found design unit 22: cpu_nios2_oci-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 3158 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "23 cpu-europa " "Info: Found design unit 23: cpu-europa" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 3969 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 cpu_rf_module " "Info: Found entity 1: cpu_rf_module" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 32 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "2 cpu_nios2_oci_debug " "Info: Found entity 2: cpu_nios2_oci_debug" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 165 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "3 cpu_ociram_lpm_dram_bdp_component_module " "Info: Found entity 3: cpu_ociram_lpm_dram_bdp_component_module" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 287 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "4 cpu_nios2_ocimem " "Info: Found entity 4: cpu_nios2_ocimem" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 425 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "5 cpu_nios2_avalon_reg " "Info: Found entity 5: cpu_nios2_avalon_reg" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 586 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "6 cpu_nios2_oci_break " "Info: Found entity 6: cpu_nios2_oci_break" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 679 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "7 cpu_nios2_oci_xbrk " "Info: Found entity 7: cpu_nios2_oci_xbrk" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1168 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "8 cpu_nios2_oci_match_paired " "Info: Found entity 8: cpu_nios2_oci_match_paired" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1379 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "9 cpu_nios2_oci_match_single " "Info: Found entity 9: cpu_nios2_oci_match_single" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1419 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "10 cpu_nios2_oci_dbrk " "Info: Found entity 10: cpu_nios2_oci_dbrk" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1458 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "11 cpu_nios2_oci_itrace " "Info: Found entity 11: cpu_nios2_oci_itrace" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1709 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "12 cpu_nios2_oci_td_mode " "Info: Found entity 12: cpu_nios2_oci_td_mode" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1913 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "13 cpu_nios2_oci_dtrace " "Info: Found entity 13: cpu_nios2_oci_dtrace" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 1989 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "14 cpu_nios2_oci_compute_tm_count " "Info: Found entity 14: cpu_nios2_oci_compute_tm_count" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2094 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "15 cpu_nios2_oci_fifowp_inc " "Info: Found entity 15: cpu_nios2_oci_fifowp_inc" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2172 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "16 cpu_nios2_oci_fifocount_inc " "Info: Found entity 16: cpu_nios2_oci_fifocount_inc" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2220 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "17 cpu_nios2_oci_fifo " "Info: Found entity 17: cpu_nios2_oci_fifo" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2271 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "18 cpu_nios2_oci_pib " "Info: Found entity 18: cpu_nios2_oci_pib" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2721 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "19 cpu_traceram_lpm_dram_bdp_component_module " "Info: Found entity 19: cpu_traceram_lpm_dram_bdp_component_module" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2800 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "20 cpu_nios2_oci_im " "Info: Found entity 20: cpu_nios2_oci_im" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 2933 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "21 cpu_nios2_performance_monitors " "Info: Found entity 21: cpu_nios2_performance_monitors" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 3098 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "22 cpu_nios2_oci " "Info: Found entity 22: cpu_nios2_oci" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 3123 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "23 cpu " "Info: Found entity 23: cpu" {  } { { "cpu.vhd" "" { Text "C:/altera/Hengdun/LED/cpu.vhd" 3934 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu LCD:inst3\|cpu:the_cpu " "Info: Elaborating entity \"cpu\" for hierarchy \"LCD:inst3\|cpu:the_cpu\"" {  } { { "LCD.vhd" "the_cpu" { Text "C:/altera/Hengdun/LED/LCD.vhd" 3062 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "cpu_test_bench.vhd 2 1 " "Warning: Using design file cpu_test_bench.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 cpu_test_bench-europa " "Info: Found design unit 1: cpu_test_bench-europa" {  } { { "cpu_test_bench.vhd" "" { Text "C:/altera/Hengdun/LED/cpu_test_bench.vhd" 75 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 cpu_test_bench " "Info: Found entity 1: cpu_test_bench" {  } { { "cpu_test_bench.vhd" "" { Text "C:/altera/Hengdun/LED/cpu_test_bench.vhd" 29 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}