ethernet.c

Mavell AP32 无线模块驱动。VxWorks BSP BootRom源代码

*           the port's configuration and command registers.
*       3. Initialize and enable the SDMA by writing to the SDMA's 
*    configuration and command registers.
*       After completing these steps, the ethernet port SDMA can starts to 
*       perform Rx and Tx activities.
*
*       Note: Each Rx and Tx queue descriptor's list must be initialized prior  
*       to calling this function (use etherInitTxDescRing for Tx queues and 
*       etherInitRxDescRing for Rx queues).
*
* INPUT:
*       ETH_PORT_INFO 	*pEthPortCtrl       Ethernet port control struct
*
* OUTPUT:
*       Ethernet port is ready to receive and transmit.
*
* RETURN:
*       false if the port PHY is not up.
*       true otherwise.
*
*******************************************************************************/
ETH_STATUS ethPortStart(ETH_PORT_INFO *pEthPortCtrl)
{
    int queue;
    volatile ETH_TX_DESC *pTxCurrDesc;
    volatile ETH_RX_DESC *pRxCurrDesc;
	unsigned int portStatus;

	/* Assigment of Tx CTRP of given queue */
	for(queue = 0; queue < MAX_TX_QUEUE_NUM; queue++)
	{
        CURR_TFD_GET (pTxCurrDesc, queue);
		PORT_REG_WRITE((CURR_TX_DESC_PTR0_OFFSET  + (4 * ((queue+1)%2))),
                        (unsigned int)pTxCurrDesc);
									
	}

    /* Assigment of Rx FRDP CRDP of given queue */
	for(queue = 0; queue < MAX_RX_QUEUE_NUM; queue++)
	{
        CURR_RFD_GET (pRxCurrDesc, queue);
		PORT_REG_WRITE((FIRST_RX_DESC_PTR0_OFFSET + (4 * queue)),
                        (unsigned int)pRxCurrDesc); 		
		PORT_REG_WRITE((CURR_RX_DESC_PTR0_OFFSET  + (4 * queue)),
                        (unsigned int)pRxCurrDesc);
	}

    /* Assign port configuration and command. */
    PORT_REG_WRITE(PORT_CONFIG_REG,        pEthPortCtrl->portConfig);
    PORT_REG_WRITE(PORT_CONFIG_EXTEND_REG, pEthPortCtrl->portConfigExtend);
    PORT_REG_WRITE(PORT_COMMAND_REGISTER,  pEthPortCtrl->portCommand);
    PORT_REG_WRITE(SDMA_CONFIG_REGISTER,   pEthPortCtrl->portSdmaConfig);

    /* Enable port Rx. */
	ETH_SDMA_ENABLE_RX();
	
    /* Check if link is up */
    PORT_REG_READ(PORT_STATUS_REGISTER, &portStatus);
	
	if(!(portStatus & LINK_UP_BIT))
		return ETH_ERROR;
	
	/*ethDebg(pEthPortCtrl);*/
	
	return ETH_OK;
}

#ifdef DRV_DEBUG
void ethDebg(ETH_PORT_INFO 		*pEthPortCtrl)
{
	int queue;
    volatile ETH_TX_DESC *pTxCurrDesc;
    volatile ETH_RX_DESC *pRxCurrDesc;

	logMsg("port info:\n",0,0,0,0,0,0);
	logMsg("struct addr       = 0x%08x\n",(unsigned int)pEthPortCtrl,0,0,0,0,0);
	logMsg("portBaseAddr      = 0x%08x\n",
                      (unsigned int)pEthPortCtrl->portBaseAddr,0,0,0,0,0);
	logMsg("portNum           = 0x%08x\n",
                      (unsigned int)pEthPortCtrl->portNum,0,0,0,0,0);
	logMsg("portPhyAddr       = 0x%08x\n",
                      (unsigned int)pEthPortCtrl->portPhyAddr,0,0,0,0,0);
	logMsg("portConfig        = 0x%08x\n",
                      (unsigned int)pEthPortCtrl->portConfig,0,0,0,0,0);
	logMsg("portConfigExtend  = 0x%08x\n",
                      (unsigned int)pEthPortCtrl->portConfigExtend,0,0,0,0,0);
	logMsg("portCommand       = 0x%08x\n",
                      (unsigned int)pEthPortCtrl->portCommand,0,0,0,0,0);
	logMsg("portSdmaConfig    = 0x%08x\n",
                      (unsigned int)pEthPortCtrl->portSdmaConfig,0,0,0,0,0);
	logMsg("portSdmaCommand   = 0x%08x\n",
                      (unsigned int)pEthPortCtrl->portSdmaCommand,0,0,0,0,0);
	logMsg("portAddrTableBase = 0x%08x\n",
                      (unsigned int)pEthPortCtrl->portAddrTableBase,0,0,0,0,0);
	
    /* Assigment of Rx FRDP CRDP of given queue */
	for(queue = 0; queue < MAX_RX_QUEUE_NUM; queue++)
	{
        USED_RFD_GET (pRxCurrDesc, queue);
		logMsg("pRxQueue%d.usedDescPtr = 0x%x\n",queue ,
               (unsigned int)pRxCurrDesc,0,0,0,0);

		CURR_RFD_GET (pRxCurrDesc, queue);
		logMsg("pRxQueue%d.currDescPtr = 0x%x\n",queue ,
               (unsigned int)pRxCurrDesc,0,0,0,00);
	}

	/* Assigment of Tx CTRP of given queue */
	for(queue = 0; queue < MAX_TX_QUEUE_NUM; queue++)
	{
        USED_TFD_GET (pTxCurrDesc, queue);
		logMsg("pTxQueue%d.usedDescPtr = 0x%x\n",queue ,
               (unsigned int)pTxCurrDesc,0,0,0,0);

		CURR_TFD_GET (pTxCurrDesc, queue);
		logMsg("pTxQueue%d.currDescPtr = 0x%x\n",queue ,
               (unsigned int)pTxCurrDesc,0,0,0,0);
	}

}
#endif
/**************************************************************************
*
* marfecPhyInit - initialize and configure the PHY device.
*
* 1) Stop any port activity.
* 1) Clear Ethernet port MIB counters.
* 2) Configure the address table to the given MAC address.
*
*
* RETURNS: OK or ERROR.
*
*/

static ETH_STATUS ethernetAddrTableInit(ETH_PORT_INFO *pEthPortCtrl)
{
    /* initialize the address table to filter other MAC addresses */
    initAddressTable(pEthPortCtrl, 
                     pEthPortCtrl->portNum, 
                     0,
                     1,
                     0, 
                     pEthPortCtrl->portAddrTableBase);
    
    /* Add the assigned Ethernet address to the port's address table */
	ethPortMacAddr(pEthPortCtrl, pEthPortCtrl->portMacAddr, ADD_MAC_ADDR);

	/* Enable address table filtering */
	pEthPortCtrl->portConfig &= ~ETH_PROMISCUOUS_MODE & 
							 ~ETH_HASH_FUNCTION_1  & 
							 ~ETH_HASH_PASS_NOT_FOUND;
	pEthPortCtrl->portConfig |= ETH_HASH_SIZE_500B;

	return ETH_OK;
    }

/*******************************************************************************
* ethPortMacAddr - This function interfaces the port address table
*
* DESCRIPTION:
*		This function add/remove MAC addresses from the port MAC address.
*
* INPUT:
*		DRV_CTRL *pDrvCtrl      Pointer to DRV_CTRL structure
*		char *      pAddr		Address to be added/removed 
*		int addRemoveFlag		0 = Add, 1 = remove address.
*
* OUTPUT:
*		See description.
*
* RETURN:
*		ETH_OK is output succeeded.
*		ETH_ERROR if addAddressTableEntry( ) failed.
*
*******************************************************************************/
ETH_STATUS ethPortMacAddr(ETH_PORT_INFO *pEthPortCtrl, 
                          char *pAddr, 
                          int addRemoveFlag)
{
    unsigned int macH;
    unsigned int macL;
	ADRS_TABLE_STATUS	retVal;
				
	if (addRemoveFlag == CLEAR_MAC_ADDR)
    {
        /* AR: clear MAC address */
    }
	macH =  (pAddr[0] << 8) | (pAddr[1]);
	macL =  (pAddr[5] << 0) | (pAddr[4] << 8) |
			(pAddr[3] << 16)| (pAddr[2] << 24);

	retVal = addAddressTableEntry(pEthPortCtrl->portNum,
								  macH,
								  macL,
								  1,
								  addRemoveFlag);
    if (retVal == ADRS_TABLE_OK)
        return ETH_OK;
    else
        return ETH_ERROR;
}
/*******************************************************************************
*
* ethClearMibCounters - clear the mib counters of one ETHERNET port 
*
* This routine set the mibClr bit (PCEX#16) to 0 , read all mib counters,
* and then set the mibClr bit to 1. 
*
* Inputs:
* portNumber - the ETHERNET port number.
*
* RETURNS: true.
*/

ETH_STATUS ethClearMibCounters (ETH_PORT_INFO *pEthPortCtrl)
{
	int 			ix;
	unsigned int 	dummy;
	unsigned int	portConfigExtend;

	/* Clear MIB counters in three stages */   

	/* 1) Reset portConfigExtend bit[16] to 'Clear' */
    PORT_REG_READ(MIB_COUNTER_BASE, &portConfigExtend);
    portConfigExtend &= ~MIB_CLEAR_MODE; 
    PORT_REG_WRITE(MIB_COUNTER_BASE, portConfigExtend);

    /* 2) Perform dummy reads from MIB counters */
    for(ix = MIB_COUNTER_BASE; ix < MIB_COUNTER_END; ix += 4)
        PORT_REG_READ(ix, &dummy);
                                                   
    /* 3) Set the portConfigExtend bit[16] to 'Not effect' */
    PORT_REG_READ(MIB_COUNTER_BASE, &portConfigExtend);
    portConfigExtend |= MIB_CLEAR_MODE; /* Reset portConfigExtend bit[16] */
    PORT_REG_WRITE(MIB_COUNTER_BASE, portConfigExtend);

	return ETH_OK;
}

extern int qdInit();
/**************************************************************************
*
* marfecInit - initialize and configure the GT device.
* This routine makes the appropreate preparation to enable the GT to rceive 
* and transmit ethernet packets using any one of its Ethernet port.
* 
* 1) Set Ethernet port multiplex control.
* 2) Set 'Serial Ports Multiplex' register with MII/RMII value.
*
* RETURNS: OK or ERROR.
*
*/
static ETH_STATUS ethernetPhyInit(ETH_PORT_INFO *pEthPortCtrl)
{    
	qdInit();
	
	return ETH_OK;
}

/**************************************************************************
*
* marfecReset - reset the `marfec' interface
*
* This routine resets the chip by aboarting any SDMA engine activity and
* clearing the MIB counters.The Receiver And the Transmit Unit are in idle 
* state after this command is performed.
*
* RETURNS: OK or ERROR, if the command was not successful.
*/

void ethPortReset(ETH_PORT_INFO *pEthPortCtrl)
{
    unsigned int  	regData;
	
	/* Stop Tx port activity. Check port Tx activity. */
	PORT_REG_READ(SDMA_COMMAND_REGISTER, &regData);

	/* Extract channel activity information */
	regData &= (ETH_START_TX_HIGH | ETH_START_TX_LOW);
	regData = (regData >> 23);	

    if(regData)
	{
		/* Issue stop command for active channels only */
		PORT_REG_WRITE(SDMA_COMMAND_REGISTER, (regData << 16));

		/* Wait for all Tx activity to terminate. */
		do
		{
			/* Check port cause register that Tx high and low stopped */
			PORT_REG_READ(SDMA_COMMAND_REGISTER, &regData);
		}
		while(regData & (ETH_START_TX_HIGH | ETH_START_TX_LOW));
	}
	
    /* Stop Rx port activity */
    PORT_REG_WRITE(SDMA_COMMAND_REGISTER, ETH_ABORT_RECEIVE);
	
	/* Wait for all Rx activity to terminate */
	do
	{
		PORT_REG_READ(SDMA_COMMAND_REGISTER, &regData);
	}
	while(regData & ETH_ABORT_RECEIVE);
	

	/* Clear all MIB counters */
    ethClearMibCounters(pEthPortCtrl);

	/* Reset the Enable bit in the Configuration Register */
    PORT_REG_READ(ETH_CAUSE_REG_OFFSET, &regData);
	regData &= ~PORT_ENABLE;
    PORT_REG_WRITE(ETH_CAUSE_REG_OFFSET, regData);
	
	return;
    }

/*****************************************************************************
*
* marfecEndConfig - reconfigure the interface under us.
*
* DESCRIPTION
* Reconfigure the interface setting promiscuous mode.
*
* RETURNS: N/A
*
* NOMANUAL
*/

void ethernetSetConfigReg(ETH_PORT_INFO *pEthPortCtrl, unsigned int value)
{
    unsigned int ethConfigReg;

	PORT_REG_READ(PORT_CONFIG_REG, &ethConfigReg);
	ethConfigReg |= value;
	PORT_REG_WRITE(PORT_CONFIG_REG, ethConfigReg);
	
	return;
}

/*****************************************************************************
*
* marfecEndConfig - reconfigure the interface under us.
*
* DESCRIPTION
* Reconfigure the interface setting promiscuous mode.
*
* RETURNS: N/A
*
* NOMANUAL
*/

void ethernetResetConfigReg(ETH_PORT_INFO *pEthPortCtrl, unsigned int value)
{
    unsigned int ethConfigReg;