⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 fpga.c

📁 PFGA的驱动 可直接使用
💻 C
字号:
/**************************************************************
	demo.c
	linux driver example for UP-netarm3000 & UP-netarm2410 
	It can be compiled for x86 PC
	author: zou jian-guo <ah_zou@163.com>
	date:   2004-8-20

***************************************************************/


#define CONFIG_DEVFS_FS


#ifndef __KERNEL__
#  define __KERNEL__
#endif
#ifndef MODULE
#  define MODULE
#endif


#include <linux/config.h>
#include <linux/module.h>
#include <linux/devfs_fs_kernel.h>

#include <linux/init.h>
#include <linux/kernel.h>   /* printk() */
#include <linux/slab.h>   /* kmalloc() */
#include <linux/fs.h>       /* everything... */
#include <linux/errno.h>    /* error codes */
#include <linux/types.h>    /* size_t */
#include <linux/proc_fs.h>
#include <linux/fcntl.h>    /* O_ACCMODE */
#include <linux/poll.h>    /* COPY_TO_USER */
#include <asm/system.h>     /* cli(), *_flags */#include <linux/mm.h>#include <linux/slab.h>#include <linux/delay.h>#include <linux/sched.h>#include <linux/interrupt.h>#include <linux/sound.h>#include <linux/soundcard.h>#include <linux/pm.h>#include <asm/uaccess.h>#include <asm/hardware.h>#include <asm/semaphore.h>#include <asm/dma.h>#include <asm/arch/cpu_s3c2410.h>
#include <linux/kernel.h>#include <linux/sched.h>#include <linux/isapnp.h>#include <linux/init.h>#include <linux/delay.h>#include <asm/system.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>//#define LCD_DEBUG#include <linux/sched.h>#include <linux/fs.h>#include <linux/tty.h>#include <linux/console.h>#include <linux/console_struct.h>#include <linux/string.h>#include <linux/kd.h>#include <linux/malloc.h>#include <linux/vt_kern.h>#include <linux/vt_buffer.h>#include <linux/selection.h>#include <linux/ioport.h>#include <asm/io.h>#include <unistd.h>
#define DEVICE_NAME		"fpga"
#define fpga_MAJOR 252
#define fpga_MINOR 0
static int MAX_BUF_LEN=1024;
static char drv_buf[1024];
static int WRI_LENGTH=0;static long read_address;struct data{   	unsigned int address;	unsigned int rgb;};
/*************************************************************************************/
static ssize_t  fpga_write(struct file *filp,const char *buffer, size_t count)
{ 	struct data *data1;//	char tempbuf[3];	int rgb;	unsigned int rgb_p;
//	if(count > MAX_BUF_LEN)count = MAX_BUF_LEN;
	copy_from_user(drv_buf , buffer, count);
//	WRI_LENGTH = count;/*   2005.12.20
	printk("user write %d bytes data to fpga\n", count);	printk("drv_bur[0]  is %d\n", drv_buf[0]);	printk("drv_bur[1]  is %d\n", drv_buf[1]);	printk("drv_bur[2]  is %d\n", drv_buf[2]);	printk("drv_bur[3]  is %d\n", drv_buf[3]);	printk("drv_bur[4]  is %d\n", drv_buf[4]);	printk("drv_bur[5]  is %d\n", drv_buf[5]);	printk("drv_bur[6]  is %d\n", drv_buf[6]);	printk("drv_bur[7]  is %d\n", drv_buf[7]);*/		data1 = drv_buf;	//printk("FPGA base address is %d \n",0xd6000000);	//printk("FPGA base address is %d \n",(FPGA_BASE + data1->address));	//printk("user write address is %d \n",data1->address);	//printk("user write pixel data is%d \n",data1->rgb);	rgb_p = data1->rgb;	//printk("user write pixel data is%d \n",rgb_p);	outl_p(data1->rgb, FPGA_BASE + data1->address);/*	tempbuf[0] = drv_buf[4];	tempbuf[1] = drv_buf[5];	tempbuf[2] = drv_buf[6];	tempbuf[3] = drv_buf[7];	outsl(IDE_BASE + (data1->address)*4, tempbuf, 1);	tempbuf[0] = 0x00;	tempbuf[1] = 0x00;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 32, tempbuf, 1);	tempbuf[0] = 0x02;	tempbuf[1] = 0x00;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 0, tempbuf, 1);	tempbuf[0] = 0x7C;	tempbuf[1] = 0x00;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 4, tempbuf, 1);	tempbuf[0] = 0x80;	tempbuf[1] = 0x02;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 8, tempbuf, 1);	tempbuf[0] = 0x10;	tempbuf[1] = 0x03;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 12, tempbuf, 1);	tempbuf[0] = 0x02;	tempbuf[1] = 0x00;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 16, tempbuf, 1);	tempbuf[0] = 0x49;	tempbuf[1] = 0x00;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 20, tempbuf, 1);	tempbuf[0] = 0xE0;	tempbuf[1] = 0x01;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 24, tempbuf, 1);	tempbuf[0] = 0x58;	tempbuf[1] = 0x02;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 28, tempbuf, 1);	tempbuf[0] = 0x00;	tempbuf[1] = 0x00;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 32, tempbuf, 1);	tempbuf[0] = 0x01;	tempbuf[1] = 0x00;	tempbuf[2] = 0x00;	tempbuf[3] = 0x00; 	outsl(IDE_BASE + 32, tempbuf, 1);	//outb_p(data1->rgb, IDE_BASE + data1->address);//	outsw(IDE_BASE + data1->address, tempbuf, 1);*/
	return count;
}
/*************************************************************************************/
static ssize_t  fpga_read(struct file *filp, char *buffer, size_t count,loff_t *ppos)
{		int value;
	if(count > MAX_BUF_LEN)
		count=MAX_BUF_LEN;	//printk("FPGA base address is %d \n",read_address);	value = inl_p(FPGA_BASE + read_address);
	copy_to_user(buffer, &value,count);
	//printk("user read data from driver \n");	//printk("FPGA value is %d \n",value);	
	return count;
}
/*************************************************************************************/
static int fpga_ioctl(struct inode *inode, struct file *file, 
                 unsigned int cmd, unsigned long arg)
{
 //       unsigned int count;//	struct ori ori1;//	count=1000;//	printk("ioctl runing\n");       
	switch(cmd){
		case 1:{//printk("runing command 1 \n");             	if (copy_from_user (&read_address, (long*)arg, sizeof (long))) {		//printk("runing command 1 fail\n");			return -EFAULT;}//			lcd_clear_text();//			lcd_xy(ori1.x,ori1.y);			break;			}			
		case 2:{printk("runing command 2 \n");//			lcd_clear_text();			break;}
		default:
			printk("error cmd number\n");break;
	}
	return 0;
}
/*************************************************************************************/
static int fpga_open(struct inode *inode, struct file *file)
{	MOD_INC_USE_COUNT;
//	sprintf(drv_buf,"device open sucess! \n");
//	printk("FPGA: device open sucess!\n");
	return 0;
}
/*************************************************************************************/
static int  fpga_release(struct inode *inode, struct file *filp)
{
	MOD_DEC_USE_COUNT;
	printk("FPGA: device release\n");
	return 0;
}

/*************************************************************************************/
static struct file_operations fpga_fops = {
	owner:	THIS_MODULE,
	write:	fpga_write,	
	read:	fpga_read,	
	ioctl:	fpga_ioctl,
	open:	fpga_open,
	release:	fpga_release,
};
/*************************************************************************************/

#ifdef CONFIG_DEVFS_FS
static devfs_handle_t  devfs_fpga_dir, devfs_fpgaraw;
#endif

/*************************************************************************************/
static int __init fpga_init(void)
{
#ifdef CONFIG_DEVFS_FS
	devfs_fpga_dir = devfs_mk_dir(NULL, "fpga", NULL);
	devfs_fpgaraw = devfs_register(devfs_fpga_dir, "fpga0", DEVFS_FL_DEFAULT,
			fpga_MAJOR, fpga_MINOR, S_IFCHR | S_IRUSR | S_IWUSR,
			&fpga_fops, NULL);
#else
	int  result;
    SET_MODULE_OWNER(&fpga_fops);
    result = register_chrdev(fpga_MAJOR, "fpga", &fpga_fops);
    if (result < 0) return result;
//    if (demo_MAJOR == 0) demo_MAJOR = result; /* dynamic */
#endif
/*lcd 2005*///set_gpio_ctrl(GPIO_LCD11);	BWSCON = ((BWSCON & ~(BWSCON_ST3 | BWSCON_WS3 | BWSCON_DW3)) |		(BWSCON_ST3 | BWSCON_DW(3, BWSCON_DW_32)))|0x00004000;	//BWSCON = (BWSCON & ~(BWSCON_ST2 | BWSCON_WS2 | BWSCON_DW2)) |	//	(BWSCON_WS2 | BWSCON_DW(2, BWSCON_DW_16));	BANKCON3= BANKCON_Tacs4 | BANKCON_Tcos4 | BANKCON_Tacc14 |		BANKCON_Toch4 | BANKCON_Tcah4 | BANKCON_Tacp6 | BANKCON_PMC1;	if (!request_region(FPGA_BASE, 0x1000000, DEVICE_NAME))	return -EBUSY;/*lcd 2005*/printk(DEVICE_NAME " initialized\n");//printk("drv_bur[7]  is %d\n", BWSCON);//printk("drv_bur[7]  is %d\n", BANKCON5);	return 0;
}

/*************************************************************************************/
static void __exit  fpga_exit(void)
{#ifdef CONFIG_DEVFS_FS		devfs_unregister(devfs_fpgaraw);	devfs_unregister(devfs_fpga_dir);#endif
    unregister_chrdev(fpga_MAJOR, "fpga");    release_region(FPGA_BASE, 0x20);
    //kfree(demo_devices);
	printk(DEVICE_NAME " unloaded\n");
}

/*************************************************************************************/
module_init(fpga_init);
module_exit(fpga_exit);

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -