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📄 tuner.hold

📁 terawin的t103 LCD驱动程序
💻 HOLD
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//#include "tuner_LS_BF2035.h"
#include "tuner_PHILIPS_FQ1216.h"
//#include "tuner_PHILIPS_FQ1236.h"
//#include "tuner_PHILIPS_FQ1286.h"
//#include "tuner_PHILIPS_PA2NF71NA.h"
//#include "tuner_TSVN1_P01F.h"
//#include "tuner_TSVN1_P01F.h"

//-------- TV channel region -------------------------------
#define TV_REGION_US          		0  // USA
#define TV_REGION_JP          		1  // Japan
#define TV_REGION_EP          		3  // Europe
#define TV_REGION_EP_SECAM    		4  // Europe_Secam
#define TV_REGION_CN          		5  // China

//-------- Frequency definition (Unit: 1Hz)
#define FREQ_HZ               		1L                     // Hz
#define FREQ_KHZ              		1000L * FREQ_HZ        // KHz
#define FREQ_MHZ              		1000L * FREQ_KHZ       // MHz
#define FREQ(n,unit)          		(n * FREQ_##unit)

//------- Define vision IF frequency
#define TUNER_VIF_NTSC       		FREQ(45.750, MHZ)
#define TUNER_VIF_NTSC_J     		FREQ(58.750, MHZ)
#define TUNER_VIF_PAL        		FREQ(38.900, MHZ)
#define TUNER_VIF_PAL_CN     		FREQ(39.937, MHZ)

//------- Define tuning frequency )
#define FREQ_NTSC(rf, unit)       	(FREQ(rf, unit)+TUNER_VIF_NTSC    )/TUNER_DIV_RATIO
#define FREQ_NTSC_J(rf, unit)     	(FREQ(rf, unit)+TUNER_VIF_NTSC_J  )/TUNER_DIV_RATIO
#define FREQ_PAL(rf, unit)        	(FREQ(rf, unit)+TUNER_VIF_PAL     )/TUNER_DIV_RATIO
#define FREQ_PAL_CN(rf, unit)     	(FREQ(rf, unit)+TUNER_VIF_PAL_CN  )/TUNER_DIV_RATIO

// -----------------------------------------------------------------------------
//   Tuner Part Bit Allocation
// -----------------------------------------------------------------------------
  /* ---------------------------------+-----------------------------------
                                      | b7  b6  b5  b4  b3  b2  b1  b0 ACK
     ---------------------------------+-----------------------------------
     Address BYTE               (ADB) | 1   1   0   0   0   MA1 MA0 0   A
     ---------------------------------+-----------------------------------
     Program divider BYTE 1     (DB1) | 0   n14 n13 n12 n11 n10 n9  n8  A
     Program divider BYTE 2     (DB2) | n7  n6  n5  n4  n3  n2  n1  n0  A
     ---------------------------------+-----------------------------------
     Control information BYTE 1 (CB1) | 1   Cp  T2  T1  T0  RSA RSB OS  A
     Control information BYTE 2 (CB2) | P7  P6  P5  P4  P3  P2  P1  P0  A
     ---------------------------------+----------------------------------- */

// ------- Address BYTE (ADB)                 //  MA1 MA0           AS
#define TUNER_MA1       0x04                  //   0   0 |  0      ~ 0.1Vcc
#define TUNER_MA0       0x02                  //   0   1 |  0.2Vcc ~ 0.3Vcc
                                              //   1   0 |  0.4Vcc ~ 0.6Vcc
                                              //   1   1 |  0.9Vcc ~    Vcc
                                              
// ------- Control information BYTE 1 (CB1)
#define TUNER_CP        0x40                  // Charge pump setting
#define TUNER_T2        0x20                  // Test mode setting 2
#define TUNER_T1        0x10                  // Test mode setting 1
#define TUNER_T0        0x08                  // Test mode setting 0
#define TUNER_RSA       0x04                  // Ratio select bit A
#define TUNER_RSB       0x02                  // Ratio select bit B
#define TUNER_OS        0x01                  // PLL Disibling

#define TUNER_RS_50     (    0     |    0     )    	// Ratio select = 50    KHz step-size
#define TUNER_RS_3125   (    0     | TUNER_RSB)   	// Ratio select = 32.25 KHz step-size
#define TUNER_RS_1667   (TUNER_RSA | 	0	  )   	// Ratio select = 166.7 KHz step-size
#define TUNER_RS_6250   (TUNER_RSA | TUNER_RSB)		// Ratio select = 62.6  KHz step-size

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