system.h

terawin的t103 LCD驱动程序

/****************************************************************************
* File: SYSTEM.H                                                            *
* Description: Header file for SYSTEM                                       *
****************************************************************************/
#ifndef __SYSTEM_H__
#define __SYSTEM_H__

///----------------Analog panel----------------------//

#include <reg51.h>
///----------------Analog panel----------------------//
//#include "AU_7_A.h"		    // T100A,T102,T106,T112
//#include "PANASONIC_7_A.h"
//#include "AU_5_6_A.h"
//#include "PVI_7_A.h"
//#include "PVI_9_A.h"
//#include "LG_7_A.h"
//#include "TOSHIBA_7_A.h"
//#include "PVI_10_A.h"
//#include "AU_3_5_A.h"
//#include "CPT_9_A.h"
//#include "Sharp_7_A.h"
//#include "TMD_5_8_A.h"
//#include "PVI_5_A.h"
//#include "SANYO_7_A.h"
//#include "PVI_6_2_A.h"
//#include "CHILIN_10_2_A.h"
//#include "LG_6_5_A.h"   		// T100A
//#include "PVI_3_5_A.h"   		// T102
///----------------Digital panel--------------------//
//#include "AU_7_D.h"
//#include "HITACH_7_D.h"
//#include "HANSTAR_9_D.h"
#include "INCH_10_2_D.h"
//#include "SHARP_8_D.h"
//#include "TOSHIBA_7_7_D.h"
//#include "TOSHIBA_12_D.h"
//#include "AU_12_D.h"
//#include "INCH_17_D.h"
//#include "CMV_10_2_D.h"
//#include "CPT_7_D.h"		   // T101A
//#include "CHILIN_10_2_D.h"
///----------------Digital panel- Serial RGB type-------------------//
//#include "CHILIN_2_4_S.h"	   // T101A
//#include "AU_2_5_S.h"		   // T101A


#define AUTO_DETECT
#define FIX_OUTPUT_TIMING	  // for fixed (fine tune) output timing and scaling
//#define LOADFILTER
//#define Enable_HelfSample   // Before enable HelfSample, you must fix OutputTiming first.
//#define T515
//#define RESET_EEPROM
//#define YPbPr
//#define OtherSingnals
//#define VBI_CC // kenny 20060403
//#define TV
#define VGA
#define T102_DEMOBOARD

#define TIMER0_H_       



//***************************************************************
//                        define Port                           *
//***************************************************************

sbit 	BKLIGHT_EN		= P0^7;
sbit	AUDIO_MUTE		= P1^4;
sbit	CHIP_RESET      = P1^3;
sbit 	VIDEO_RESET		= P1^5;//P0^2; //P1^3;
sbit 	LED_GREEN		= P2^6;
sbit 	LED_RED		    = P2^7;

#ifdef ROTATE
sbit    LEFT_RIGHT      = P0^5;
sbit    UP_DOWN			= P0^6;
#endif
/************************************
         System
************************************/
#define TIMER0
#define INTERRUPT1
#define TIMER1
#define XCLK				27000000 
#define BACKLIGHT
#define POWER_ON_SEQUENCE
#define NVRAM

/************************************
         Display
************************************/
//#define TCON
//#define ROTATE
//#define RSDS
//#define AUDIO_AVAILABLE
//#define INTERLACED
//#define TMDS

#ifdef AUDIO_AVAILABLE
	#define VPWME			0x10
	#define PVOL_BGHS_SEL	0x04
#else
	#define VPWME			0x00
	#define PVOL_BGHS_SEL 	0x00
#endif                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           
#ifdef TMDS
	#define TMDS_LOW		39000000
	#define TMDS_HIGH       80000000
#endif
#define DIGITAL_BRIGHT
#define DIGITAL_CONTRAST
#define GAMMA_EN
#ifdef GAMMA_EN
//	#define GAMMAR_ONLY
//	#define GAMMAG_ONLY
//	#define GAMMAB_ONLY
	#define GAMMARGB_TOGETHER
#endif

#define FAILSAFE_EN
#ifdef FAILSAFE_EN
	#define VSYNC_MAX		85
#endif


/************************************
         Software Config
************************************/
#define FAILSAFE_ADJ_EN
	#define FAILSAFE_ADJ_POS 		0x01
	#define FAILSAFE_ADJ_FREQ		0x02
	#define FAILSAFE_ADJ_PHASE		0x04
#define SUBSAMPLE_ADJ_EN
	#define SUBSAMPLE_ADJ_POS		0x01
	#define SUBSAMPLE_ADJ_FREQ		0x02
	#define SUBSAMPLE_ADJ_PHASE		0x04
#define DUBLESAMPLE_ADJ_EN
	#define DUBLESAMPLE_ADJ_POS		0x01
	#define DUBLESAMPLE_ADJ_FREQ	0x02
	#define DUBLESAMPLE_ADJ_PHASE	0x04
//#define DOSMODE_ADJ_EN
	#define DOSMODE_ADJ_POS			0x01
	#define DOSMODE_ADJ_FREQ      	0x02
	#define DOSMODE_ADJ_PHASE      	0x04

//#define	GM_RGB_ALL_SAME         // mark by Sherman 05'11'17
#define ADJ_DIGITAL					1	
#define ADJ_ADC						0

//Ruby add 2005-06-07
// Bruce modified, 2006/01/10
typedef enum{
	ScaleFULL = 0x00,
#if (ZOOM_MODES >=2)
	ZOOM_1,	
#endif
#if (ZOOM_MODES >=3)
	ZOOM_2,
#endif
#if (ZOOM_MODES >=4)
	Scale4_3        ,   
#endif
#if (ZOOM_MODES >=5)
	ZOOM_3,
#endif
#if (ZOOM_MODES >=6)
	ZOOM_4,
#endif
#if (ZOOM_MODES >=7)
	ZOOM_5,
#endif
#if (ZOOM_MODES >=8)
	ZOOM_6,
#endif
#if (ZOOM_MODES >=9)
	ZOOM_7,    // add by Sherman 05'08'24
#endif
	ScaleEnd        ,  
	Scale16_9		
}Scale_Type;


#endif // __SYSTEM_H__