decoder.tan.qmsg

fpga交通控制灯

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.0 Build 33 02/05/2007 SJ Full Version " "Info: Version 7.0 Build 33 02/05/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Nov 14 15:19:39 2008 " "Info: Processing started: Fri Nov 14 15:19:39 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off decoder -c decoder --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off decoder -c decoder --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "led\[0\] decoder_led\[4\] 10.892 ns Longest " "Info: Longest tpd from source pin \"led\[0\]\" to destination pin \"decoder_led\[4\]\" is 10.892 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns led\[0\] 1 PIN PIN_T4 7 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_T4; Fanout = 7; PIN Node = 'led\[0\]'" {  } { { "c:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { led[0] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/VHDL/trafic/display/comp_decoder/decoder.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(5.575 ns) + CELL(0.114 ns) 7.164 ns Mux2~3 2 COMB LC_X1_Y2_N2 1 " "Info: 2: + IC(5.575 ns) + CELL(0.114 ns) = 7.164 ns; Loc. = LC_X1_Y2_N2; Fanout = 1; COMB Node = 'Mux2~3'" {  } { { "c:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "5.689 ns" { led[0] Mux2~3 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/VHDL/trafic/display/comp_decoder/decoder.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.620 ns) + CELL(2.108 ns) 10.892 ns decoder_led\[4\] 3 PIN PIN_N8 0 " "Info: 3: + IC(1.620 ns) + CELL(2.108 ns) = 10.892 ns; Loc. = PIN_N8; Fanout = 0; PIN Node = 'decoder_led\[4\]'" {  } { { "c:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "3.728 ns" { Mux2~3 decoder_led[4] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/VHDL/trafic/display/comp_decoder/decoder.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.697 ns ( 33.94 % ) " "Info: Total cell delay = 3.697 ns ( 33.94 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.195 ns ( 66.06 % ) " "Info: Total interconnect delay = 7.195 ns ( 66.06 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "10.892 ns" { led[0] Mux2~3 decoder_led[4] } "NODE_NAME" } } { "c:/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/70/quartus/bin/Technology_Viewer.qrui" "10.892 ns" { led[0] led[0]~out0 Mux2~3 decoder_led[4] } { 0.000ns 0.000ns 5.575ns 1.620ns } { 0.000ns 1.475ns 0.114ns 2.108ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "100 " "Info: Allocated 100 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Fri Nov 14 15:19:39 2008 " "Info: Processing ended: Fri Nov 14 15:19:39 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}