center.vhd

fpga交通控制灯

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity center is
	port(clk : in std_logic;
		 reset: in std_logic;
		 hold : in std_logic;
		 flash : out std_logic;
		 numa,numb : out integer range 0 to 30;
		 red_a,green_a,yellow_a : out std_logic;
		 red_b,green_b,yellow_b : out std_logic	 
		);
end entity;

architecture beha of center is 
signal count : integer range 0 to 59;
begin
	process(clk,reset,hold)
	begin
	
		if(rising_edge(clk))then
			if(count=59 or reset = '0')then
				count<=0;
			elsif(hold='1') then 
				count<= count + 1;
			else 
				null;
			end if;
		end if;	
	end process;
	
	process(count,hold,clk)
	begin
	if(clk'event and clk='1')then
		if(hold='0')then
			flash<='0';
			red_a<='1';
			green_a<='0';
			yellow_a<='0';
			red_b<='1';
			green_b<='0';
			yellow_b<='0';
		elsif(count<=25)then
			flash<='1';
			red_a<='1';
			green_a<='0';
			yellow_a<='0';
			red_b<='0';
			green_b<='1';
			yellow_b<='0';
			numa<=30-count;
			numb<=25-count;
		elsif(count<=30)then
			flash<='1';
			red_a<='1';
			green_a<='0';
			yellow_a<='0';
			red_b<='0';
			green_b<='0';
			yellow_b<='1';
			numa<=30-count;
			numb<=30-count;
		elsif(count<=55)then
			flash<='1';
			red_a<='0';
			green_a<='1';
			yellow_a<='0';
			red_b<='1';
			green_b<='0';
			yellow_b<='0';
			numa<=55-count;
			numb<=60-count;
		else
			flash<='1';
			red_a<='0';
			green_a<='0';
			yellow_a<='1';
			red_b<='1';
			green_b<='0';
			yellow_b<='0';
			numa<=60-count;
			numb<=60-count;
		end if;
	end if;
	end process;
end architecture;