📄 minute.sim.rpt
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; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] ; cout ;
; |minute|rtl~59 ; |minute|rtl~59 ; data_out0 ;
; |minute|count~688 ; |minute|count~688 ; data_out0 ;
; |minute|count~689 ; |minute|count~689 ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; data_out0 ;
; |minute|count~692 ; |minute|count~692 ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3] ; cout ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2] ; cout ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1] ; cout ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0] ; cout ;
; |minute|clk ; |minute|clk ; dataout ;
; |minute|daout[0] ; |minute|daout[0] ; padio ;
; |minute|daout[1] ; |minute|daout[1] ; padio ;
; |minute|daout[2] ; |minute|daout[2] ; padio ;
; |minute|daout[3] ; |minute|daout[3] ; padio ;
+----------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------+
The following table displays output ports that do not toggle to 1 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage ;
+----------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+----------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------+
; |minute|enhour~reg0 ; |minute|enhour~reg0 ; data_out0 ;
; |minute|count[4] ; |minute|count[4] ; data_out0 ;
; |minute|count[5] ; |minute|count[5] ; data_out0 ;
; |minute|count[6] ; |minute|count[6] ; data_out0 ;
; |minute|enhour~4 ; |minute|enhour~4 ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5] ; cout ;
; |minute|rtl~1 ; |minute|rtl~1 ; data_out0 ;
; |minute|enhour~118 ; |minute|enhour~118 ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] ; cout ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[4] ; cout ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[5] ; cout ;
; |minute|count~693 ; |minute|count~693 ; data_out0 ;
; |minute|count~694 ; |minute|count~694 ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[6] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[6] ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[6] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[6] ; data_out0 ;
; |minute|reset ; |minute|reset ; dataout ;
; |minute|clk1 ; |minute|clk1 ; dataout ;
; |minute|sethour ; |minute|sethour ; dataout ;
; |minute|enhour ; |minute|enhour ; padio ;
; |minute|daout[4] ; |minute|daout[4] ; padio ;
; |minute|daout[5] ; |minute|daout[5] ; padio ;
; |minute|daout[6] ; |minute|daout[6] ; padio ;
+----------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------+
The following table displays output ports that do not toggle to 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage ;
+----------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+----------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------+
; |minute|enhour~reg0 ; |minute|enhour~reg0 ; data_out0 ;
; |minute|count[4] ; |minute|count[4] ; data_out0 ;
; |minute|count[5] ; |minute|count[5] ; data_out0 ;
; |minute|count[6] ; |minute|count[6] ; data_out0 ;
; |minute|enhour~4 ; |minute|enhour~4 ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5] ; cout ;
; |minute|rtl~1 ; |minute|rtl~1 ; data_out0 ;
; |minute|enhour~118 ; |minute|enhour~118 ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] ; cout ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[4] ; cout ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[5] ; cout ;
; |minute|count~693 ; |minute|count~693 ; data_out0 ;
; |minute|count~694 ; |minute|count~694 ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[6] ; |minute|lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[6] ; data_out0 ;
; |minute|lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[6] ; |minute|lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[6] ; data_out0 ;
; |minute|reset ; |minute|reset ; dataout ;
; |minute|clk1 ; |minute|clk1 ; dataout ;
; |minute|sethour ; |minute|sethour ; dataout ;
; |minute|enhour ; |minute|enhour ; padio ;
; |minute|daout[4] ; |minute|daout[4] ; padio ;
; |minute|daout[5] ; |minute|daout[5] ; padio ;
; |minute|daout[6] ; |minute|daout[6] ; padio ;
+----------------------------------------------------------------------------------+----------------------------------------------------------------------------------+------------------+
+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage ;
+--------+------------+
+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
Info: Version 5.1 Build 176 10/26/2005 SJ Full Version
Info: Processing started: Tue Oct 28 17:03:25 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off minute -c minute
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is 50.00 %
Info: Number of transitions in simulation is 1346
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
Info: Processing ended: Tue Oct 28 17:03:26 2008
Info: Elapsed time: 00:00:01
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