📄 adi_audioezextender.c
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cSEC_RX_CLK_SRC = SEC_RX_CLK_SRC_SPDIF_RX_CLK;
cSPDIF_TX_DAT_SRC = SPDIF_TX_DAT_SRC_PRI_RX;
cSPDIF_TX_CLK_SRC = SPDIF_TX_CLK_SRC_SPDIF_RX_CLK;
}
break;
case SPDIF_TX_SRC_SECONDARY:
if (cSPDIF_TX_CLK_SELECT == SPDIF_TX_CLK_SELECT_INTCLK1)
{
cPRI_RX_CLK_SRC = PRI_RX_CLK_SRC_SLAVE;
cSEC_RX_CLK_SRC = SEC_RX_CLK_SRC_SPDIF_RX_CLK;
cSPDIF_TX_DAT_SRC = SPDIF_TX_DAT_SRC_SEC_RX;
cSPDIF_TX_CLK_SRC = SPDIF_TX_CLK_SRC_INTCLK1;
}
else if (cSPDIF_TX_CLK_SELECT == SPDIF_TX_CLK_SELECT_SPDIF_RX_CLK)
{
cPRI_RX_CLK_SRC = PRI_RX_CLK_SRC_SLAVE;
cSEC_RX_CLK_SRC = SEC_RX_CLK_SRC_SPDIF_RX_CLK;
cSPDIF_TX_DAT_SRC = SPDIF_TX_DAT_SRC_SEC_RX;
cSPDIF_TX_CLK_SRC = SPDIF_TX_CLK_SRC_SPDIF_RX_CLK;
}
break;
}
switch (cSPDIF_RX_DEST)
{
case SPDIF_RX_DEST_DISABLED:
cPRI_TX_CLK_SRC = PRI_TX_CLK_SRC_SLAVE;
cPRI_TX_DAT_SRC = PRI_TX_DAT_SRC_SPDIF_RX;
cSEC_TX_CLK_SRC = SEC_TX_CLK_SRC_SLAVE;
cSEC_TX_DAT_SRC = SEC_TX_DAT_SRC_SPDIF_RX;
break;
case SPDIF_RX_DEST_PRIMARY:
cPRI_TX_CLK_SRC = PRI_TX_CLK_SRC_SPDIF_RX_CLK;
cPRI_TX_DAT_SRC = PRI_TX_DAT_SRC_SPDIF_RX;
cSEC_TX_CLK_SRC = SEC_TX_CLK_SRC_SLAVE;
cSEC_TX_DAT_SRC = SEC_TX_DAT_SRC_SPDIF_RX;
break;
case SPDIF_RX_DEST_SECONDARY:
cPRI_TX_CLK_SRC = PRI_TX_CLK_SRC_SLAVE;
cPRI_TX_DAT_SRC = PRI_TX_DAT_SRC_SPDIF_RX;
cSEC_TX_CLK_SRC = SEC_TX_CLK_SRC_SLAVE;
cSEC_TX_DAT_SRC = SEC_TX_DAT_SRC_SPDIF_RX;
break;
case SPDIF_RX_DEST_BOTH:
cPRI_TX_CLK_SRC = PRI_TX_CLK_SRC_SPDIF_RX_CLK;
cPRI_TX_DAT_SRC = PRI_TX_DAT_SRC_SPDIF_RX;
cSEC_TX_CLK_SRC = SEC_TX_CLK_SRC_SLAVE;
cSEC_TX_DAT_SRC = SEC_TX_DAT_SRC_SPDIF_RX;
break;
}
switch (cSCLK3_SRC_MODE)
{
case SCLK3_SRC_SPDIF_RX_CLK_MODE:
cSCLK3_SRC = SCLK3_SRC_SPDIF_RX_CLK;
break;
case SCLK3_SRC_PLL2_CLK_MODE:
cSCLK3_SRC = SCLK3_SRC_PLL2_CLK;
break;
}
if ((cSCLK3_SRC_MODE == SCLK3_SRC_SPDIF_RX_CLK_MODE) || (cSPDIF_TX_FREQ == SPDIF_TX_FREQ_192K))
cINPUT_MUL = INPUT256;
else
cINPUT_MUL = INPUT512;
//PLL1/SCLK1 Setup
cFS1_FS_SEL = FS1_FS_SEL_48K;
cFS1_FS_RATIO = FS1_FS_RATIO_256FS;
cFS1_MUL = FS1_MUL_2;
cPLL1_DIV = PLL1_DIV_1;
//INTCLK2 Setup
cINTCLK2_SRC = INTCLK2_SRC_MCLK;
cINTCLK2_DIV = INTCLK2_DIV_1;
switch (pAUDIOEZEXTENDER->AnalogMode)
{
case 1:
cANALOG_SR = 192;
cTDM_SLOTS = 4;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_TDM;
break;
case 2:
cANALOG_SR = 96;
cTDM_SLOTS = 4;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_TDM;
break;
case 3:
cANALOG_SR = 48;
cTDM_SLOTS = 4;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_TDM;
break;
case 4:
cANALOG_SR = 96;
cTDM_SLOTS = 8;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_TDM;
break;
case 5:
cANALOG_SR = 48;
cTDM_SLOTS = 8;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_TDM;
break;
case 6:
cANALOG_SR = 48;
cTDM_SLOTS = 16;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_TDM;
break;
case 7:
cANALOG_SR = 48;
cTDM_SLOTS = 16;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_AUX;
break;
case 8:
cANALOG_SR = 48;
cTDM_SLOTS = 8;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_TDM;
break;
case 9:
cANALOG_SR = 96;
cTDM_SLOTS = 8;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_TDM;
break;
case 10:
cANALOG_SR = 48;
cTDM_SLOTS = 16;
cANALOG_INPUT_MODE = ANALOG_INPUT_MODE_TDM;
cANALOG_OUTPUT_MODE = ANALOG_OUTPUT_MODE_AUX;
break;
}
if (cANALOG_OUTPUT_MODE == ANALOG_OUTPUT_MODE_TDM)
cDAC_FMT = DAC_FMT_TDM;
else // ANALOG_OUTPUT_MODE_AUX
cDAC_FMT = DAC_FMT_AUX;
if (cANALOG_INPUT_MODE == ANALOG_INPUT_MODE_TDM)
cADC_FMT = DAC_FMT_TDM;
else // ANALOG_INPUT_MODE_AUX
cADC_FMT = DAC_FMT_AUX;
switch (cANALOG_SR)
{
case 48:
cDAC_SAMPLE_RATE = DAC_SR_48K;
cADC_SAMPLE_RATE = ADC_SR_48K;
break;
case 96:
cDAC_SAMPLE_RATE = DAC_SR_96K;
cADC_SAMPLE_RATE = ADC_SR_96K;
break;
case 192:
cDAC_SAMPLE_RATE = DAC_SR_192K;
cADC_SAMPLE_RATE = ADC_SR_192K;
break;
}
switch (cTDM_SLOTS)
{
case 4:
cDAC_CHANNELS = DAC_CHANNELS_4;
cADC_CHANNELS = ADC_CHANNELS_4;
break;
case 8:
cDAC_CHANNELS = DAC_CHANNELS_8;
cADC_CHANNELS = ADC_CHANNELS_8;
break;
case 16:
cDAC_CHANNELS = DAC_CHANNELS_16;
cADC_CHANNELS = ADC_CHANNELS_16;
break;
}
// names for slots in ad1938 audio frame
cADC_L1 = 0;
cADC_R1 = 2;
cADC_L2 = 4;
cADC_R2 = 6;
cADC_L3 = 1;
cADC_R3 = 3;
cADC_L4 = 5;
cADC_R4 = 7;
cSPDIF_RX_L = 8;
cSPDIF_RX_R = 10;
if ((cTDM_SLOTS == 16) && (cANALOG_OUTPUT_MODE == ANALOG_OUTPUT_MODE_TDM))
{
cDAC_L1 = 16;
cDAC_R1 = 18;
cDAC_L2 = 20;
cDAC_R2 = 22;
cDAC_L3 = 24;
cDAC_R3 = 26;
cDAC_L4 = 28;
cDAC_R4 = 30;
cDAC_L5 = 17;
cDAC_R5 = 19;
cDAC_L6 = 21;
cDAC_R6 = 23;
cDAC_L7 = 25;
cDAC_R7 = 27;
cDAC_L8 = 29;
cDAC_R8 = 31;
}
else if ((cTDM_SLOTS == 16) && (cANALOG_OUTPUT_MODE == ANALOG_OUTPUT_MODE_AUX))
{
cDAC_L1 = 8;
cDAC_R1 = 10;
cDAC_L2 = 12;
cDAC_R2 = 14;
cDAC_L3 = 16;
cDAC_R3 = 18;
cDAC_L4 = 20;
cDAC_R4 = 22;
cSPDIF_TX_L = 24;
cSPDIF_TX_R = 26;
cDAC_L5 = 17;
cDAC_R5 = 19;
cDAC_L6 = 21;
cDAC_R6 = 23;
cDAC_L7 = 25;
cDAC_R7 = 27;
cDAC_L8 = 29;
cDAC_R8 = 31;
}
else
{
cDAC_L1 = 0;
cDAC_R1 = 2;
cDAC_L2 = 4;
cDAC_R2 = 6;
cDAC_L3 = 8;
cDAC_R3 = 10;
cDAC_L4 = 12;
cDAC_R4 = 14;
cDAC_L5 = 1;
cDAC_R5 = 3;
cDAC_L6 = 5;
cDAC_R6 = 7;
cDAC_L7 = 9;
cDAC_R7 = 11;
cDAC_L8 = 13;
cDAC_R8 = 15;
}
#if (ADAV801_SUPPORT)
ADAV801_Config[1].Value = (void*)( b7_0 | b6_0 | cINTCLK2_DIV | cINTCLK1_DIV | b1_0 | b0_0);
ADAV801_Config[2].Value = (void*)( | b0_0);
ADAV801_Config[3].Value = (void*)( cPRI_RX_CLK_SRC | b2_0 | b1_0 | b0_1);
ADAV801_Config[4].Value = (void*)( cSEC_RX_CLK_SRC | b2_0 | b1_0 | b0_1);
ADAV801_Config[5].Value = (void*)( cPRI_TX_CLK_SRC | b3_0 | b2_0 | b1_0 | b0_1);
ADAV801_Config[6].Value = (void*)( cSEC_TX_CLK_SRC | b3_0 | b2_0 | b1_0 | b0_1);
ADAV801_Config[7].Value = (void*)( b7_0 | b6_0 | b5_0 | b4_0 | b3_0 | b2_0 | b1_0 | b0_0);
ADAV801_Config[8].Value = (void*)( b7_0 | b6_0 | b5_0 | b4_0 | b3_0 | b2_0 | b1_0 | b0_0);
ADAV801_Config[9].Value = (void*)( | b5_0 | b4_0 | b3_0 | b2_0 | b1_0 | b0_0);
ADAV801_Config[10].Value = (void*)( | b6_0 | b5_0 | b4_0 | b3_0 | cSPDIF_TX_CLK_SRC | b0_1);
ADAV801_Config[11].Value = (void*)( | b5_0 | b3_0 | b2_0 | b1_0 | b0_0);
ADAV801_Config[12].Value = (void*)( b7_0 | b6_0 | cPRI_TX_DAT_SRC | cSEC_TX_DAT_SRC);
ADAV801_Config[13].Value = (void*)( | b5_0 | b4_0 | b3_0 | cSPDIF_TX_DAT_SRC);
ADAV801_Config[14].Value = (void*)( b7_0 | b6_0 | b5_0 | b4_0 | b3_0 | b2_0 | b1_0 | b0_0);
ADAV801_Config[15].Value = (void*)( | b5_0 | b4_0 | b3_0 | b2_0 | b1_0 | b0_0);
ADAV801_Config[16].Value = (void*)( b7_0 | b6_0 | b5_1 | b4_0 | b3_0 | b2_0 | b1_0 | b0_0);
ADAV801_Config[17].Value = (void*)( | b4_1 | b1_0 | b0_0);
ADAV801_Config[18].Value = (void*)( cSCLK3_SRC | b5_0 | b4_0 | b3_0 | b2_0 | b1_0 | cFS3_FS_RATIO);
ADAV801_Config[19].Value = (void*)( cFS2_FS_SEL | cFS2_FS_RATIO | cFS2_MUL | cFS1_FS_SEL | cFS1_FS_RATIO | cFS1_MUL);
ADAV801_Config[20].Value = (void*)( b7_0 | b6_0 | b5_0 | b4_0 | b3_0 | b2_0 | cINTCLK2_SRC);
ADAV801_Config[21].Value = (void*)( | cINTCLK1_SRC | cPLL2_DIV | cPLL1_DIV);
ADAV801_Config[22].Value = (void*)( b7_0 | b6_0);
ADAV801_Config[23].Value = (void*)( | b5_0 | b4_0 | b2_0 | b1_0 | b0_0);
#endif
// AD1938 A CODEC
AD1938_A_Config[1].Value = (void*)(DIS_ADC_DAC | PLL_IN_MCLK | MCLK_OUT_OFF | cINPUT_MUL | PLL_PWR_DWN );
AD1938_A_Config[2].Value = (void*)(DAC_CLK_PLL | ADC_CLK_PLL | DIS_VREF );
AD1938_A_Config[3].Value = (void*)(cDAC_FMT | DAC_BLK_DLY_1 | cDAC_SAMPLE_RATE | DAC_PWR_UP);
AD1938_A_Config[4].Value = (void*)(DAC_BCLK_POL_INV | DAC_BCLK_SRC_PIN | DAC_BCLK_SLAVE | DAC_LRCLK_SLAVE | DAC_LRCLK_POL_NORM | cDAC_CHANNELS | DAC_LTCH_MID);
AD1938_A_Config[5].Value = (void*)(DAC_OUT_POL_NORM | DAC_WIDTH_24 | DAC_DEEMPH_FLAT | DAC_UNMUTE);
AD1938_A_Config[6].Value = (void*)(cADC_SAMPLE_RATE | ADC_R2_UNMUTE | ADC_L2_UNMUTE | ADC_R1_UNMUTE | ADC_L1_UNMUTE |ADC_HP_FILT_OFF | ADC_PWR_UP);
AD1938_A_Config[7].Value = (void*)(ADC_LTCH_MID | cADC_FMT | ADC_BLK_DLY_1 | ADC_WIDTH_24);
AD1938_A_Config[8].Value = (void*)(ADC_BCLK_SRC_PIN | ADC_BCLK_MASTER | cADC_CHANNELS | ADC_LRCLK_MASTER | ADC_LRCLK_POL_INV | ADC_BCLK_POL_INV | ADC_LRCLK_FMT_PULSE);
AD1938_A_Config[9].Value = (void*)0x00;
AD1938_A_Config[10].Value = (void*)0x00;
AD1938_A_Config[11].Value = (void*)0x00;
AD1938_A_Config[12].Value = (void*)0x00;
AD1938_A_Config[13].Value = (void*)0x00;
AD1938_A_Config[14].Value = (void*)0x00;
AD1938_A_Config[15].Value = (void*)0x00;
AD1938_A_Config[16].Value = (void*)0x00;
AD1938_A_Config[17].Value = (void*)0x00;
AD1938_A_Config[18].Value = (void*)(DIS_ADC_DAC | PLL_IN_MCLK | MCLK_OUT_OFF | cINPUT_MUL | PLL_PWR_UP );
AD1938_A_Config[19].Value = (void*)(ENA_ADC_DAC | PLL_IN_MCLK | MCLK_OUT_OFF | cINPUT_MUL | PLL_PWR_UP );
// AD1938 B CODEC
AD1938_B_Config[1].Value = (void*)(DIS_ADC_DAC | PLL_IN_MCLK | MCLK_OUT_OFF | cINPUT_MUL | PLL_PWR_DWN );
AD1938_B_Config[2].Value = (void*)(DAC_CLK_PLL | ADC_CLK_PLL | DIS_VREF );
AD1938_B_Config[3].Value = (void*)(DAC_FMT_TDM | DAC_BLK_DLY_1 | cDAC_SAMPLE_RATE | DAC_PWR_UP);
AD1938_B_Config[4].Value = (void*)(DAC_BCLK_POL_INV | DAC_BCLK_SRC_PIN | DAC_BCLK_SLAVE | DAC_LRCLK_SLAVE | DAC_LRCLK_POL_NORM | cDAC_CHANNELS | DAC_LTCH_MID);
AD1938_B_Config[5].Value = (void*)(DAC_OUT_POL_NORM | DAC_WIDTH_24 | DAC_DEEMPH_FLAT | DAC_UNMUTE);
AD1938_B_Config[6].Value = (void*)(cADC_SAMPLE_RATE | ADC_R2_UNMUTE | ADC_L2_UNMUTE | ADC_R1_UNMUTE | ADC_L1_UNMUTE |ADC_HP_FILT_OFF | ADC_PWR_UP);
AD1938_B_Config[7].Value = (void*)(ADC_LTCH_MID | ADC_FMT_AUX | ADC_BLK_DLY_1 | ADC_WIDTH_24);
AD1938_B_Config[8].Value = (void*)(ADC_BCLK_SRC_PIN | ADC_BCLK_SLAVE | cADC_CHANNELS | ADC_LRCLK_SLAVE | ADC_LRCLK_POL_INV | ADC_BCLK_POL_INV| ADC_LRCLK_FMT_PULSE);
AD1938_B_Config[9].Value = (void*)0x00;
AD1938_B_Config[10].Value = (void*)0x00;
AD1938_B_Config[11].Value = (void*)0x00;
AD1938_B_Config[12].Value = (void*)0x00;
AD1938_B_Config[13].Value = (void*)0x00;
AD1938_B_Config[14].Value = (void*)0x00;
AD1938_B_Config[15].Value = (void*)0x00;
AD1938_B_Config[16].Value = (void*)0x00;
AD1938_B_Config[17].Value = (void*)0x00;
AD1938_B_Config[18].Value = (void*)(DIS_ADC_DAC | PLL_IN_MCLK | MCLK_OUT_OFF | cINPUT_MUL | PLL_PWR_UP );
AD1938_B_Config[19].Value = (void*)(ENA_ADC_DAC | PLL_IN_MCLK | MCLK_OUT_OFF | cINPUT_MUL | PLL_PWR_UP );
#if (ADAV801_SUPPORT)
Result = adi_dev_Control(pAUDIOEZEXTENDER->ADAV801Handle, ADI_DEV_CMD_TABLE, ADAV801_Config);
#ifdef ADI_DEV_DEBUG
if (Result != ADI_DEV_RESULT_SUCCESS) return (Result);
#endif
// always I2S for SPORT
Result = adi_dev_Control(pAUDIOEZEXTENDER->ADAV801Handle, ADI_ADAV801_CMD_SET_OPERATION_MODE_I2S, (void*)0);
#ifdef ADI_DEV_DEBUG
if (Result != ADI_DEV_RESULT_SUCCESS) return (Result);
#endif
// configure the ADAV801 dataflow method to circular(autobuffer) mode (FIXED)
Result = adi_dev_Control(pAUDIOEZEXTENDER->ADAV801Handle, ADI_DEV_CMD_SET_DATAFLOW_METHOD, (void*)ADI_DEV_MODE_CIRCULAR);
#ifdef ADI_DEV_DEBUG
if (Result != ADI_DEV_RESULT_SUCCESS) return (Result);
#endif
#endif // ADAV801
Result = adi_dev_Control(pAUDIOEZEXTENDER->AD1938Handle, ADI_DEV_CMD_TABLE, (void*)AD1938_A_Config);
#ifdef ADI_DEV_DEBUG
if (Result != ADI_DEV_RESULT_SUCCESS) return (Result);
#endif
Result = adi_dev_Control(pAUDIOEZEXTENDER->AD1938Handle, ADI_DEV_CMD_TABLE, (void*)AD1938_B_Config);
#ifdef ADI_DEV_DEBUG
if (Result != ADI_DEV_RESULT_SUCCESS) return (Result);
#endif
// always TDM for SPORT
Result = adi_dev_Control(pAUDIOEZEXTENDER->AD1938Handle, ADI_AD1938_CMD_SET_OPERATION_MODE_TDM, (void*)0);
#ifdef ADI_DEV_DEBUG
if (Result != ADI_DEV_RESULT_SUCCESS) return (Result);
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